Buffer Memory Address Comparison - Mitsubishi Electric MELSEC L Series Manual

6
HIGH-SPEED COUNTER MODULE REPLACEMENT

6.3.4 Buffer memory address comparison

Sequence programs need to be changed because the buffer memory address assignment differs.
For details of the buffer memory areas and sequence programs, refer to the MELSEC-L High-Speed
Counter Module User's Manual.
When the built-in I/O functions of the LCPU are used, the special register is used. For details, refer to
the MELSEC-L CPU Module User's Manual (Built-in I/O Function).
A1SD62(E/D/D-S1)
Address
(decimal)
Name
CH1 CH2
0 32 Unused-
1 33
Preset value setting
2 34
3 35 Pulse input mode setting
4 36
Present value
5 37
6 38
Coincidence output point setting No.1
7 39
8 40 Counter function selection setting
9 41 Sampling/periodic time setting
10 42 External preset detection reset command
*1 *1
Point No.2 coincidence signal reset command
11 43
*1 *1
12 44
Coincidence output point set No.2
*1 *1
13 45
14 46
Latch count value
15 47
16 48
Sampling count value
17 49
18 50
Periodic pulse count previous value
19 51
20 52
Periodic pulse count present value
21 53
22 Sampling/periodic counter flag
*1 These addresses are use-prohibited in the A1SD62D-S1.
6
- 24
Address
(decimal)
Read/write
CH1 CH2
- 0 32
Preset value
(L) 1 33
(H) R/W 2 34
Present value
3 35
(L) 4 36
R Coincidence output point No.1
(H) 5 37
(L) 6 38
Coincidence output point No.2
(H) 7 39
R/W
8 40 Overflow detection
9 41 Counter function selection
10 42 Sampling/periodic time setting
W
11 43 Sampling/periodic counter flag
(L) 12 44
R/W Latch count value
(H) 13 45
(L) 14 46
Sampling count value
(H) 15 47
(L) 16 48
Periodic pulse count, previous value
(H) 17 49
(L) R 18 50
Periodic pulse count, present value
(H) 19 51
(L) 20 52
Ring counter lower limit
(H) 21 53
22 54
Ring counter upper limit
23 55
24 56
to to System area (Use prohibited)
31 63
LD62(D)
Name Read/write
(L)
R/W
(H)
(L)
R
(H)
(L)
(H)
R/W
(L)
(H)
R
R/W
(L)
(H)
(L)
R
(H)
(L)
(H)
(L)
(H)
(L)
(H)
R/W
(L)
(H)
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