Mitsubishi Q2ACPU User Manual page 476

Qna series melsec
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APPENDICES
Number
Name
Meaning
Annunciator
Annunciator
SD62
number
number
Number of
Number of
SD63
annunciators
annunciators
SD64
SD65
SD66
SD67
SD68
SD69
SD70
SD71
Table of
detected
Annunciator
SD72
annunciator
detection number
numbers
SD73
SD74
SD75
SD76
SD77
SD78
SD79
SD80
CHK number
CHK number
SD90
SD91
SD92
SD93
Step transition
monitoring timer
F number for timer
SD94
setting value
set value and time
(Enabled only
SD95
over error
when SFC
program exists)
SD96
SD97
SD98
SD99
Table App. 3.2. Special register
Explanation
• The first annunciator number (F number) to be detected is stored here.
• Stores the number of annunciators searched.
When F goes ON due to
or
OUT F
progressively ON from SD64 through SD79 are registered.
The F numbers turned OFF by
RST F
and the F numbers stored after the deleted F numbers are shifted to the
preceding registers.
Execution of the
instruction shifts the contents of SD64 to SD79
LEDR
up by one.
(This can also be done by using the INDICATOR RESET switch on the of
the Q3A/Q4ACPU.)
After 16 annunciators have been detected, detection of the 17th will not be
stored from SD64 through SD79.
SET
SET
SET
RST
SET
SET
SET
SET
F50
F25
F99
F25
F15
F70
F65
F38
SD62 0 50 50 50 50 50 50 50 50 50 50 50 99 (Number
SD63 0
1
2
3
2
3
4
5
SD64
0 50 50 50 50 50 50 50 50 50 50 50 99
SD65
0
0 25 25 99 99 99 99 99 99 99 99 15
SD66
0
0
0 99 0 15 15 15 15 15 15 15 70
0 70 70 70 70 70 70 65
SD67
0
0
0
0
0
0 65 65 65 65 65 38
SD68
0
0
0
0
0
0
0 38 38 38 38 110
SD69
0
0
0
0
0
0
0
SD70
0
0
0
0
0
0
0
0
SD71
0
0
0
0
0
0
0
0
SD72
0
0
0
0
0
0
0
0
SD73
0
0
0
0
0
0
0
0
SD74
0
0
0
0
0
0
0
0
SD75
0
0
0
0
0
0
0
0
SD76
0
0
0
0
0
0
0
0
SD77
0
0
0
0
0
0
0
0
SD78
0
0
0
0
0
0
0
0
SD79
0
0
0
0
0
0
0
0
• Error codes detected by the CHK instruction are stored as BCD code.
Corresponds to
• Set the annunciator number (F number) that will
SM90
be turned ON when the step transition
Corresponds to
monitoring timer setting or monitoring timeout
SM91
occurs.
Corresponds to
SM92
b15
to
Corresponds to
SM93
Corresponds to
SM94
F number setting
Corresponds to
(0 to 255)
SM95
Corresponds to
SM96
Corresponds to
• Turning ON any of SM90 to SM99 during an
SM97
active step starts the timer, and if the transition
Corresponds to
condition next to the corresponding step is not
SM98
met within the timer time limit, the set
Corresponds to
annunciator (F) turns ON.
SM99
App - 79
, the F numbers which go
SET F
are deleted from SD64 - SD79,
SET
SET
SET
F110
F151
F210 LEDR
detected)
(Number of
6
7
8
9
8
annunciators
detected)
0 110 110 110 151
151 210
0
0 151
(Number
detected)
0
0
0
210
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b8
b7
to
b0
Timer time limit
setting
(1 to 255s:
(1s units))
Corres-
ponding
Set by
Corresponding
ACPU
(When Set)
D9
S (Instruction
D9009
execution)
S (Instruction
D9124
execution)
D9125
D9126
D9127
D9128
D9129
D9130
D9131
D9132
S (Instruction
New
execution)
New
New
New
New
New
New
New
S (Instruction
New
execution)
D9108
D9109
D9110
D9111
D9112
U
D9113
D9114
New
New
New
CPU
QnA
QnA
QnA
QnA
QnA

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