Flash Programming; Cobba-Gj - Nokia NSE-6 SERIES Service Manual

PAMS
Technical Documentation

Flash Programming

The preprogrammable phone has to be connected to the flash loading
adapter (FLA–5) via modular cable (XCM–5). When FLA–5 switches sup-
ply voltage to the service box (JBU–5), a short pulse (IBI pulse) is gener-
ated to the power supply circuit via BTEMP line.
The power supply circuit (N100) switches power on and releases MCU
(MAD2) from reset state (power up reset, PURX rises up to 1 (2.8 V).
The program execution starts from the internal boot ROM of MAD2 and
MCU investigates the status of the MBUS line. Normally this line is high
(2.8 V) because of pull up resistor R115, but when the flash program
adapter is connected, the MBUS line is forced low. When MCU has recog-
nized the flash loading adapter (MBUS line is low), it gives program start
(MCU boot) information to the flash loading adapter by forcing flash_tx
(FBUS_TX) line low.
The flash prommer sends all needed data for flash programming to phone
via flash_rx (FBUS_RX) line. The phone (MCU) sends all programming
acknowlegment signals for flash prommer via flash_tx (FBUS_TX) line.
The acknowlegment information (rising and falling edge of flash_tx line)
signal is sent to flash prommer when each step of flash programming is
passed. Flash_tx line is also used to send hardware configuration in-
formation (flash type etc.) to the flash prommer. Flash_tx and flash_rx
data is synchronized to flash clock signal, which is sent from the flash
prommer to phone via flash clock line (MBUS).
The flash programming voltage (VPP) is generated internally. Switchable
voltage regulator N201 (or N202) is used to generate flash programming
voltage for the program memory (D220). The regulator is controlled by
MCU (MAD2) via MCUGenOutput pin 1. The input voltage for the flash
programming voltage regulator is taken from output of charger pump
(J224) of power supply circuit CCONT (N100). The programming voltage
(3 V +/– 10 %) is supplied via UI connector X303 (pins 1,3) to the pro-
gram memory D220. Thus the flash programming voltage (VPP) is
switched on only during the flash erasing and programming states.
COBBA–GJ
The COBBA–GJ provides an interface between the baseband and the
RF–circuitry. COBBA–GJ performs analogue to digital conversion of the
receive signal. For transmit path COBBA_GJ performs digital to analogue
conversion of the transmit amplifier power control ramp and the in–phase
and quadrature signals. A slow speed digital to analogue converter will
provide automatic frequency control (AFC).
The COBBA asic is at any time connected to MAD asic with two inter-
faces, one for transferring tx and rx data between MAD and COBBA and
one for transferring codec rx/tx samples.
Original 08/98
NSE–6
System Module
Page 3 – 43