Table 1-20: Clock Input; Table 1-21: Trigger Input - Tektronix AWG70001A Technical Reference

Specifications
Table 1-19: Clock output (cont.)
Characteristics
Frequency resolution
Internal and fixed reference
clock operation
External variable reference
clock operation:

Table 1-20: Clock input

Characteristics
Connector type
Input impedance
Input amplitude
Frequency range

Table 1-21: Trigger input

Characteristics
Number of inputs
Connector
Input impedance
Polarity
Input voltage range
1 kΩ selected
50 Ω selected
Input voltage minimum amplitude
Threshold control
Range
Resolution
Accuracy
1–14
Description
With jitter reduction: 50 MHz
Without jitter reduction: 100 MHz ÷ 2
With jitter reduction: Fref ÷ R
Without jitter reduction: Fref ÷ R ÷ 2
Fref = reference clock frequency
R = 4 when 140 MHz < Fref ≤ 240 MHz
R = 2 when 70 MHz < Fref ≤ 140 MHz
R = 1 when 35 MHz ≤ Fref ≤ 70 MHz
Description
The external clock input can be used to create the DAC sample clock. This clock must always
operate in the octave range specified below. It is multiplied and divided to create the actual
DAC sample clock.
SMA on rear panel
50 Ω(AC coupled)
0 dBm to +10 dBm
6.25 GHz to 12.5 GHz
Acceptable frequency drift while the instrument is operating is ±0.1%.
Description
2
SMA on rear panel
1 kΩ or 50 Ω selectable
Positive or negative selectable
–10 V to 10 V
< 5 V
RMS
0.5 V minimum
p-p
–5.0 V to 5.0 V
0.1 V
± (5% of |setting| + 0.1 V)
AWG70000A Series and AWGSYNC01 Technical Reference
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