Interrupt Control; Dram Management - Epson ActionLaser 1600 Service Manual

Principles of Operation
I n t e r r u p t C o n t r o l
ASIC E05A93 determines the priority level of an interrupt and outputs it to
terminals IRL0 - IRL3. Then the interrupt is sent to the CPU. When the value of
IRL0-3 is 1111 (binary), the CPU processes a non-maskable interrupt. When the
value of IRL0-3 is 0000 (binary), CPU processes a standard interrupt. When
IRL0-3 is another value, the CPU processes a maskable interrupt.
D R A M M a n a g e m e n t
The video controller uses DRAMs for system RAM and for V-RAM.
In this printer, a standard four 512K x 8 DRAMs are mounted in locations IC20,
IC19, IC17, and IC16, providing a total of 2MB. SIMM sockets 1 (CN8) and 2
(CN9) are the optional SIMM sockets, which can use 1, 2, 4, 8, 16, 32 MB, 32-bit
bus SIMMs.
The DRAMs (including optional SIMMs) are managed by ASIC E05A91. The
E05A91 outputs MA0-10 (memory address), RAS/CAS, and WE signals.
Figure 2-40. DRAM Management
EPSON ActionLaser 1600 Service Manual 2-31