Protection For Rack Faults (Arc-Over Within Capacitor Banks); Overvoltage - GE C70 Instruction Manual

Capacitor bank protection and control system
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PROTECTION METHODS FOR CAPACITOR BANKS
With grounded capacitor banks, the failure of one pole of the switching device or the single phasing from a blown
bank fuse allows zero sequence currents to flow in system ground relays. Coordinate capacitor bank relaying,
including the operating time of the switching device, with the operation of the system ground relays to avoid tripping
system load.
The unbalance trip element can need to be delayed to account for the settling time of the protection system on initial
energization and for the transient response of certain capacitor voltage transformers, and so on, which can be a part
of the unbalance protection system
The unbalance trip scheme can include a lockout feature to prevent inadvertent closing of the capacitor bank
switching device if an unbalance trip has occurred
To allow for the effects of inherent unbalance, set the unbalance element trip to operate at a signal level halfway
between the critical step and the next lower step. The critical step is the number of fuse operations or shorted
elements that cause an overvoltage on healthy capacitor units in excess of 110% of the capacitor unit rated voltage
or the capacitor unit manufacturer's recommended maximum continuous operating voltage. In addition, for internally
fused capacitor units, the critical step can be the number of internal fuse operations at which tripping should occur as
recommended by the capacitor manufacturer.
If switch failure or single phasing due to a blown main fuse can result in the continuous voltage exceeding the relay or
VT rating, configure additional elements in the relay to trip the bank for this condition
The unbalance element detects only the unbalance in the capacitor bank and in supply voltage and does not respond
to capacitor overvoltage due to a balanced system voltage above nominal. Configure the bank phase overvoltage to
trip the bank for this condition.
Use the maximum system operating voltage, with capacitor bank energized, for setting unbalance relays
8.3.2.3 Unbalance alarm element considerations
To allow for the effects of inherent unbalance within the bank, set the unbalance relay alarm to operate at about one-half
the level of the unbalance signal determined by the calculated alarm condition based on an idealized bank. Set the alarm
with sufficient time delay to override external disturbances.

8.3.3 Protection for rack faults (arc-over within capacitor banks)

The most effective protection for an arc-over within the capacitor bank is provided by a fast unbalance element. A short
time delay for the unbalance elements minimizes the damage caused by rack faults. Intentional delays as short as 0.05
seconds have been used. This short unbalance time delay, however, should not be less than the maximum clearing time of
the capacitor-unit or element fuse. Although the unbalance trip element is the most effective protection for arc detection
of a series section, do not rely on the neutral voltage type of unbalance element for rack fault protection on capacitor
banks where all three phases are not well separated.
Negative sequence elements can be used for inter-phase fault detection as they can be set to be more sensitive than
phase overcurrent relays, but tripping should be delayed to coordinate with the other relays in the system. A setting of 10%
of the rated capacitor current, taking into consideration the maximum system voltage unbalance and the maximum
capacitance variation together with a time delay setting of 15 to 25 cycles, can provide adequate coordination for faults
external to the bank. However, it may not prevent damage due to arcing faults within the bank structure.
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8.3.4 Overvoltage

The capacitor bank and other equipment in the vicinity can be subject to overvoltages resulting from abnormal system
operating conditions. If the system voltage exceeds the capacitor or equipment capability with the capacitor bank on line,
remove the bank with minimum time delay. Removing the capacitor bank from the system lowers the system voltage in
the vicinity of the capacitor, reducing the overvoltage on other system elements.
Especially for very large EHV capacitor banks, it is advisable to install three-phase overvoltage protection (ANSI 59B) to trip
the bank quickly for extreme overvoltage conditions. To avoid nuisance tripping during transient overvoltage conditions, in
some cases, tripping is delayed by a timer. The C70 provides inverse time overvoltage characteristics required to decrease
tripping time for large overvoltages.
Because this tripping is not due to a fault within the capacitor bank, the capacitor bank is not locked out.
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C70 CAPACITOR BANK PROTECTION AND CONTROL SYSTEM – INSTRUCTION MANUAL
CHAPTER 8: APPLICATION OF SETTINGS

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