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3.1 REGISTER TYPES
The following paragraphs discuss the different types of registers used in the MAC.
3.1.1 Read/Write Registers
These registers can be read and written by the NP at any time. Usually, these registers
cannot be modified by the MAC chip. The only exceptions are the RESET_FIELD and
FDX_MODE bits in control register B. These registers are all cleared by power-up reset
(see Section 4 Signal Description for a description of the PWRUP pin). Most bits in these
registers are unaffected by a MAC_Reset.
3.1.2 Read/Control Write Registers
These registers can be read by the NP at any time but can be written only when the MAC
FSMs are turned off (see MAC_ON bit in the control register A). These registers hold chip
parameters that the MAC needs before it can operate correctly. The NP should write these
registers before BIST is run. These registers cannot be modified by the MAC chip. All
these registers are cleared by power-up reset but are unaffected by a MAC_Reset.
3.1.3 Read-Only/Clear Registers
These registers can be read by the NP at any time (like all registers) but can never be
written by the NP (even in test mode). Unlike read-only registers, these registers are
automatically cleared when read by the NP. If the MAC chip tries to modify a register that
is being accessed by the NP, the register is cleared and the MAC writes the new updated
state. The MAC chip can change these registers at any time, even when the MAC FSMs
are turned off. These registers are all cleared by power-up reset.
3.1.4 Read-Only Registers
These registers can be read by the NP at any time but can never be modified by the NP.
The MAC chip can change these registers at any time, even when the MAC FSMs are
turned off. Generally, they are undefined after power-up reset.
The first six of these read-only registers (24–29 hex) are the only ones that are of interest
to general-purpose software. Through the remaining registers, the user can access almost
all MAC internal states. Access to these registers is essential for both ATE testing and
board-level diagnostics. Many of these registers hold part of an internal 24- or 32-bit
register that can change on each BYTCLK. Since only one register can be read at a time,
it may be difficult for an NP to obtain a consistent value of the internal register without
stopping BYTCLK.
Whenever the NP attempts to read a nonexistent register, the MAC chip completes the NP
read cycle normally (returning a valid, though unpredictable value) and records the
erroneous event by setting the NP_ERR bit in the interrupt event register B.
MOTOROLA
MC68838 USER'S MANUAL
3-3
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