Download Print this page

Transmit Data Host Lnterface; Send Frame Logic; Capture Token Logic - Motorola MC68838 User Manual

Media access controller
Hide thumbs


Frame data at the transmit latch logic can have any one of the following sources:
• The transmit data path latch, which contains the symbol pair passed from the FSI via
the external TPATHx bus. This latch is part of the FSI TX interface logic.
• The delimiter generator, which transmits frame delimiters like idles, J, TT, etc., in
response to requests from the transmit FSM.
• The transmit CRC generator, which appends the frame check sequence to the end
of the data field.
• The address registers, which hold this station's individual addresses and its value of
desired token rotation time for void, claim, and beacon frames. These registers are
properly a part of the receive data logic but can be accessed by the transmit data
logic as needed.

2.3.1 Transmit Data Host lnterface

The FSI logic controls the TPATHx bus over which the FSI passes packets to be
transmitted to the MAC. This logic handles all the extra control and handshake lines
required for the TPATHx bus. For example, it controls the reception of packet request
information from the FSI, the notification that the MAC is ready for the next packet or
packet request header, etc. This logic does not communicate with the FSI receive logic.

2.3.2 Send Frame Logic

The send frame block is responsible for the actual transmission of a frame including the
sequencing and sending of (i.e., multiplexing of) the preamble, the appropriate
delimiters (e.g., JK, TR, RR, etc.) the FC field (for token, claim, beacon, and void frames),
the DA and SA fields (for claim, beacon, and void frames where they could be my long
address register, broadcast or null address), information fields (claim and beacon
frames), general data (FC, SA, DA, and INFO fields for FSI frames), the CRC field, and
the requested frame status. The transmit FSM tells this logic what kind of frame to send
and when to start sending it.

2.3.3 Capture Token Logic

This logic block holds the packet request header passed to it by the FSI. The packet
request header contains all the information that the MAC transmitter needs to determine
when it can send this frame (i.e., asynchronous/synchronous, token type, immediate
mode or not, etc.), what type of token to issue later, whether a CRC is to be generated,
etc. In addition to parsing this information, this block contains the logic to determine
when a token can be captured and issued and when a frame can be transmitted. It feeds
these signals into the transmit FSM that takes the appropriate action depending upon its
current state.



  Related Manuals for Motorola MC68838