GE UR Series C70 Instruction Manual page 7

Capacitor bank protection and control system
Table of Contents

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10. APPLICATION OF
A. FLEXANALOG AND
FLEXINTEGER
PARAMETERS
B. MODBUS
GE Multilin
TABLE OF CONTENTS
8.3.1
OVERVIEW...................................................................................................... 8-15
8.3.2
ENABLING THE SECURITY MANAGEMENT SYSTEM ................................. 8-15
8.3.3
ADDING A NEW USER ................................................................................... 8-15
8.3.4
MODIFYING USER PRIVILEGES ................................................................... 8-16
9.1.1
GENERAL OPERATION.................................................................................... 9-1
9.1.2
BANK PHASE OVERVOLTAGE (ANSI 59B)..................................................... 9-1
9.1.3
VOLTAGE DIFFERENTIAL (ANSI 87V) ............................................................ 9-3
9.1.4
9.1.5
PHASE CURRENT UNBALANCE (ANSI 60P) ................................................ 9-10
9.1.6
NEUTRAL CURRENT UNBALANCE (ANSI 60N) ........................................... 9-12
10.1 ARRANGEMENT OF SHUNT CAPACITOR BANKS
10.1.1
OVERVIEW...................................................................................................... 10-1
10.1.2
EXTERNALLY FUSED CAPACITORS ............................................................ 10-1
10.1.3
INTERNALLY FUSED CAPACITORS ............................................................. 10-1
10.1.4
FUSELESS CAPACITORS .............................................................................. 10-2
10.1.5
UNFUSED CAPACITORS ............................................................................... 10-2
10.2.1
GROUNDED WYE-CONNECTED BANKS ...................................................... 10-3
10.2.2
UNGROUNDED WYE-CONNECTED BANKS................................................. 10-3
10.2.3
DELTA-CONNECTED BANKS ........................................................................ 10-3
10.2.4
H-CONFIGURATION ....................................................................................... 10-3
10.2.5
TAPPED CONFIGURATION............................................................................ 10-3
10.2.6
SUMMARY....................................................................................................... 10-4
10.3.1
DESCRIPTION................................................................................................. 10-5
10.3.2
CAPACITOR UNBALANCE PROTECTION..................................................... 10-5
10.3.3
10-10
10.3.4
OVERVOLTAGE ............................................................................................ 10-10
10.3.5
OVERCURRENT ........................................................................................... 10-11
10.3.6
LOSS OF BUS VOLTAGE ............................................................................. 10-11
10.4.1
DESCRIPTION............................................................................................... 10-12
10.4.2
VT AND CT SETUP ....................................................................................... 10-12
10.4.3
SOURCE ASSIGNMENT ............................................................................... 10-13
10.4.4
BANK UNBALANCE CALCULATIONS .......................................................... 10-14
10.4.5
BANK VOLTAGE DIFFERENTIAL SETTINGS .............................................. 10-16
10.4.6
BANK PHASE CURRENT UNBALANCE SETTINGS.................................... 10-18
10.4.7
BANK PHASE OVERVOLTAGE SETTINGS ................................................. 10-19
10.4.8
BANK PHASE UNDERVOLTAGE SETTINGS .............................................. 10-20
10.4.9
BANK OVERCURRENT PROTECTION ........................................................ 10-21
A.1.1
FLEXANALOG ITEMS .......................................................................................A-1
A.1.2
FLEXINTEGER ITEMS ....................................................................................A-32
B.1.1
INTRODUCTION................................................................................................B-1
B.1.2
PHYSICAL LAYER.............................................................................................B-1
B.1.3
DATA LINK LAYER............................................................................................B-1
C70 Capacitor Bank Protection and Control System
vii

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