1, 10, And 100 Volt Range Switching; 1000 Volt Range; Absolule Value Amplifier - HP 3456A Operating And Service Manual

Model 3456A
to go to - I S V (FET turned off). With a high logic in­
put signal, the comparator's output transistor is turned
off and the output rises via the pull-up resistor to
+
ground (FET turned on). For those comparator stages
that have [he 2 V reference applied to their positive
terminal rather than the negative terminals, the com­
parator operation is exactly opposite of that just
described.
t
8-146. 1, 10, and 100 Vol
feedback circuit consisting of Q2, U6, and U7 (see
Figure 8-34) is used for the I , 10, and 100 V ranges.
Gain for this circuit is set by the value of the feedback
resistor (S K, 50 K, or 500 K) selected for the measure­
ment range in use. FET switches are used to select the
proper feedback resistor.
8-147. Figure 8-32 shows the FET switches and feed­
I
back resistor used for the I V range. The logic level on
the H I (High True, V range) line to the comparators
goes high (from 0 V to + S V) when the I V range is
(RT)
selected . FET switches Q9 and QS are turned on (HI)
and FET switch QII
When a range other than I V is selected, H I will go low.
FET's Q9 and QS are turned off during these times and
QI I is turned on. FET Q I I shorts out the I V range
feedback path then the I V range is not selected.
Figure 8·32. FEY Switches and Feedback Path for
Ae Volt Measurement. 1 V Ranil.
8-148. Resistor R47-capacitor C23 (connected to input
of Q5) and resistor RSI -capacitor C23 (connected to in­
put of Q7) are R-F filters for the respective I V and 10 V
ranges . These circuits minimize any R-F that could be
rectified by the switching FET's and added to the input
signal.
8-149. Input Amplifier.
sisting of Q2, U6, U7, and associated circuitry inverts
and scales down (attenuates) the input signal. An
inverted-attenuated version of the input signal appears
at TP9. Gains of 1 12, 1 120, and 11200 for the respective
1 V, 10 V, and 1 00 V ranges are obtained by selecting
A negative
Range Switching.
is turned off at this time.
The Input Amplifier con­
the proper feedback resistors. These fi x ed gains are set
by the I M ohm input resistor and the feedback
resistors. Utilizing fine-line resistors (.010/0) eliminate
the need for fine-gain adjustments. Full scale inputs for
the I V, 10 V, and 100 V ranges gives a .S V output at
TP9.
8-ISO. A source follower input (Q2, gain of I) is used to
keep the input impedance to this circuit high. U6 is a
non-inverting positive gain stage that is con figured to
cancel out dc voltage drift. This stage has an open-loop
dc voltage gain of 80 dB; the ac gain is 8. Diodes CR
8-1 I clamp the output of U6 at
saturation. The positions of jumpers 3 and 4 in the
U6-Q2 feedback voltage divider are factory selected for
zero dc offset voltage at TP9. Variable resistor RI2 (N
adjust) is used for the final calibration dc offset adjust­
ment.
8-ISI. FET switch Q20 is only turned on when the I V
range is enabled (HIA). The gain of the U2, U6, and U7
circuit is then 10 times greater. Resistor R23 and
JMPR's 9 and 10 are used in the Q20 circuit for the high
frequency factory calibration.
8-152. The output amplifier stage (U7) inverts the
signals that go back (via feedback resistors) to the input
of Q2. The value of C26 (across input-output of U7) is
selected during the factory high frequency adjustment.

8-153. 1000 VOLT RANGE.

for the 1 000 V range (note that the 1000 V range
measures voltages up to 700 V rms or 1 000 V peak,
whichever is less). This inverting amplifier has a gain of
1/400. With a 700 V rms input, full scale output is 1.75
V. When the 1000 V range is selected, the H4 line
changes from - 1 5 V to 0 V (FET switch Q8 turned on).
Referring to the "Range/logic Level Table" located on
schematic 8 (AC Converter) note that HM in addition to
H4 is high true when the 1000 V range is selected. HM
and HM enable (via FET switches QI and Q3) the 100 V
feedback path for the Q2, U6, and U7 circuit. This
stabilizes the Q2, U6, and U7 circuit by keeping it out of
saturation during those times when the 1000 V range is
selected.
8·154. The signals appearing at TP2 (output of U I ) is
an attenuated version of the input signal applied to the
AC Converter. JMPR I is provided so that the output
line from U I can be opened for troubleshooting.

8-155. Absolule Value Amplifier.

amplifier circuit uses a full-wave rectifying technique to
solve for the absolute value of its input signals. This
operation is similar to a full-wave rectifier in that the
negative portion of the signal is inverted and combined
with the positive portion. The rectjfying diodes (CR5
and CR7) are located in the feedback loop of U4. This
feedback technique drives the diodes into and out of
conduction in response to very small signal changes.
Because of the high gain of U4, the signal loss for the
Service
± l A
V to prevent
Amplifier U I is used only
The Absolute Value
8-27