Hp-Ib (A3 Board); Interface Adapter - HP 3456A Operating And Service Manual

Model 3456A
3
7
Figure 8·55. Internel Circuit Diagram For
A20S2·0S7 and OS9.
an imernal circuit diagram for these displays, for addi­
tional information regarding the display operation.
Note that all of the anodes o f each displays are tied to
pin 3 so that the position (OS2 or OS3 or etc.) of the
digit to be displayed is selected by the digit (anode) drive
lines from A4U29 that are connected to the seven
displays. (Also note that the line connected to P4. pin 26
(from pin 1 8 o f A4U29) is nOI used). The numerical
value to be displayed, in the selected position, is deter­
mined by the segment (cathode) drive lines from A4V29
that are connected to the display cathodes.
8-283. Five-segment LEO displays with right hand
decimal points are used for the A20S1 and OS8
displays. Refer to the illuSlration in Schematic 1 1 for
OS 1 and also to Figure 8-56 for the external and internal
d
3
7
Figure 8·56. Internal Circuit Diagram For
A20S 1 and OS8.
4
connections used for these displays. The OS8 display is
rotated 180 degrees before it is inserted into the display
1
socket. This is done so that Ihe only segments used in
1 3
OS8, the c, d, and e segments ( + and -), are closer to
the DS9 exponent digit to which they apply.
8-284. Individual LEO's are used for the Annunciator
status indicators. The Annunciator LEO anodes and
cathodes are connected and driven in a matrix fashion
1 0
like that used for the digit displays.
8·285. Hp·IB (A3 Board. see Schematic 13. Hp·IB Logic).
General. The HP-IB Logic provides the means
8-286.
8
for the Main Controller to imerface with the HP-IB
(Hewlell-Packard Interface Bus). The HP-IB allows the
3456A to communicate with other HP-IB compatible in­
6-55
strumems. The logic circuit consists of the following:
a. Interface Adapter (A3V9).
b. Address-Select Switch (AISI).
c . Bidirection
Transceivers VI2 and U7, DID I -DID 8 Oata Bus).
d. Oata Byte Transfer Control (Bus Transceiver U8
and Handshake Lines).
e. Interface Managemem Control (Bus Transceiver
V l 4 and Managemem Control Lines).
Refer to Appendix A of this manual for additional in­
formation on the HP-lB.
Inlerrace Adapter
8-287.
Adapter is interfaced with the Main Controller (A4U 1 5
p.P) via the 8-bit bidirectional data bus (00-D7), ad­
dress lines AO-A2, and four Control lines (HP-IB Select,
R/W, RST, and NMI). Clock for U9 is supplied by Ihe
Main Controller circuits (A4UI4). The interface be­
tween U9 and the HP-IB is via DID I-DID 8 bus (Oata
1 4 Input/Output) and the Handshake (3 lines) and
Management Comrol (5 lines) lines. Four tri-state Bus
Transceivers (A3U 12, U7. U8, and U 14) serve as the bus
1 3
drivers for these 1 6 HP-IB lines.
1 2
8-288. The U9 Interface Adapter has 8 working
registers which are addressed by the Main Controller p.P
via AO-A2 address lines. The Main Comroller generates
a low on the HP-IB Select line (chip select) when data is
1 1
read into or out o f U9 over the 8-bit bidirectional data
bus (00-07). The Main Controller sets the R/W
(Read/Write) line high when it is reading data from U9
and sets the line low when it is writing data to U9. The
NMI (Nonmaskable Interrupt) line is used by U9 to in­
8
terrupt the Main Controller p.P when it has data to send
(data from its Interrupt Status Register). The NMI line
stays low until the p.P reads the data. A low to high tran­
6-SG
sition on the RST (Reset) line initializes U9 at power
turn-on. This transition is delayed to assure that the
+ 5 V power supply is up and ready before initialization
occurs.
Communication L i n k
The HP-IB Imerface
(A3U9).
Service
(Bus
8· 51