Rms Converter; Squaring Amplifier; Averaging Amplifier; Square Root Amplifier - HP 3456A Operating And Service Manual

Service
low level signals at the higher frequencies are reduced.
The total circuit is an inverting amplifier that deals with
currents rather than voltages.
8-156. Op amp U4 (bipolar amplifier) drives transistors
Q I 2 and QI3. The collectors of QI2 and QI3 are the
current sources that turn on rectifying diodes CR5 and
CR7. Diode CR7 is turned on during the positive por­
tion of the input signal and CR5 is turned on during the
negative portion. The signal at the anode of CR5 is in­
verted by U2. The output of U2 (gain of I) and the
signal at the cathode of CR7 are combined for a full­
wave rectified output.
8-157. The Absolute Value Amplifier has a gain of 2.5
for the I , 10, and lOO V ranges and a .5 gain for the
V range. This gain difference is due to the two different
input resistance paths (20 K and 1 00 K) at the input of 010)
U4. Fine-line (.0 I resistors are used for all of the gain
setting resistances.
8-158. Variable resistor R I 3 (M adjust) is used for the
final calibration dc offset adjustment of the Absolute
Value Amplifier stage. The positions of JMPR's 2 and 6
are factory selected to optimize the adjustment range of
R I 3 .
The RMS Converter calculates

8-159. RMS Converter.

the rms value of the signals appearing at the output of
the Absolute Value Amplifier. The mathematical ex­
pression for the measurement of an rms voltage is:
Vo= This states that the output voltage (Vo)
2.
Vin
is equal to the square root(r) of the average(m) of the in­
put voltage (Vin) squared(s). The RMS Converter is
divided into the following three sections (for the circuit
description see Figure 8-34): Squaring Amplifier,
Square Root Amplifier, and Averaging Amplifier.

8-160. Squaring Amplifier.

a logging amplifier whose output is proportional to 2
times the log of its input voltage. A logging amplifier
has a gain that is inversely proportional to its input
signal. The greater the signal, the less the amplification.
8-161. This circuit consists of an inverting op amp stage
(U5) with two transistors (QI6A and Q 1 7A) connected
in the negative feedback path. The negative input ter­
minal of U5 is at a virtual ground potential. With the
collector of QI6A connected to this virtual ground and
its base connected directly to ground, QI6A becomes a
base-emitter junction (diode).
8-162. The resistance of QI6A and QI7A base-emitter
junctions is a function of the current generated by the
input voltage through the 25 K ohm input resistors (25 K
ohm fine-line resistors preceeding JMPR 5). The input
current nows into the op amp summing node-assume
that no current nows into the amplifier. The feedback
circuit causes the amplifier output to produce whatever
10
voltage is required produce a feedback current that
will exactly balance the input current. Transistor Q I 5 is
8-28
1000
The Squaring Amplifier is
the current source for U5's feedback loop. QI5 provides
quick slewing for high crest factor measurements.
8-163. The action of each base-emitter junction (log ele­
ment) in the feedback path is to take the log of the input
voltage (log V in ). Since there are
put of the Squaring Amplifier will be 2 log (V in ) or log
(V in ) 2 .
8-164. The summing point at the input of U5 is always
above ground so current will not be drawn from QI6A
and Q l 7A-pulling current from Q16A will reverse bias
QI6a and turn off this junction.
8-165. Averaging Amplifier and Square
The operations of the Averaging Amplifier
Amplifier.
and the Square Root Amplifier are simultaneous and in­
terdependent . Summing or time averaging takes place in
the Averaging Amplifier. The square root of Ihis time
averaged input ("mean" value) is taken by the Square
Root Amplifier-this reverses the action of the Squar­
ing Amplifier. The combined output of the Averaging
and Square Rool amplifiers is a dc level proportional to
the rms value of the input signal.

8-166. Averaging Amplifier.

is a 3-pole active filter consisting of op amp U 12 and the
R-C networks connected to the output of U 12. Pole
consists of C28 and the 282.2
line resistors that are in parallel with C28. Pole 2 con­
sists of C30, Rn, and R73 and pole 3 consists of C33,
R78, and R79. The time constant for pole I is changed
(changed from fast ac measurement position by the
front panel FILTER button) when FET switch Q21
closed by logic signal HAF (High True Analog Filter).
This connects C29 in parallel with C28 which increases
the R-C time constant. FET switches Q22 and Q23 are
open (HAF) when the Analog Filter is enabled . This
also increased the R-C time constant by removing R73
and R79 from the circuit. Diode CRI4 holds the source
of Q21 at .7 V (one diode junction voltage drop). This
prevents any forward biasing of Q21 (due to leakage
current through Q21 charging C29) thal may turn this
FET on when the Analog Filter is disabled.
8-167. The output from the Averaging Amplifier, U12,
(TPI4) is connected to the input of the Square Root
Amplifier, U 1 3 . The output of U l 3 is connected to the
input of UI2, so amplifier UI3 appears in the feedback
circuit of amplifier U12. Source follower QI4, in the
output of the Averaging Amplifier, is a unity gain buf­
fer stage.

8-168. Square Root Amplifier.

Amplifier consists of an inverting op amp stage (Ul3)
with a base-emitter junction (QI68) connected in the
negative feedback path. The base and collector of QI68
are at approximately the same potential since the collec­
tor is connected to virtual ground. The current now
thorugh the base-emitter junctions of QI68 and QI78
(antilog elements) balance out the current through
Model 3456A
junctions, the out­
[WO
Root
The Averaging Amplifier
I
K
and 138.6 K ohm fine­
is
The Square Root
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