ST STM32F103x6 Manual page 33

STM32F103xx
Output voltage levels
Unless otherwise specified, the parameters given in
performed under ambient temperature and V
Table 7.
Table 30.
Symbol
(1)
V
OL
(2)
V
OH
(1)
V
OL
(2)
V
OH
(1)
V
OL
(2)
V
OH
(1)
V
OL
(2)
V
OH
1. The I
IO
and the sum of I
2. The I
IO
Table 5
Output voltage characteristics
Parameter
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
Output high level voltage for an I/O pin
when 4 pins are sourced at same time
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
Output high level voltage for an I/O pin
when 4 pins are sourced at same time
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
Output high level voltage for an I/O pin
when 4 pins are sourced at same time
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
Output high level voltage for an I/O pin
when 4 pins are sourced at same time
current sunk by the device must always respect the absolute maximum rating specified in
(I/O ports and control pins) must not exceed I
IO
current sourced by the device must always respect the absolute maximum rating specified in
and the sum of I (I/O ports and control pins) must not exceed I
IO
Electrical characteristics
Table 30 are derived from tests
supply voltage conditions summarized in
DD
Conditions
TTL port
I = +8 mA
IO
2.7 V < V < 3.6 V
DD
CMOS port
I =+ 8mA
IO
2.7 V < V < 3.6 V
DD
I = +20 mA
IO
2.7 V < V < 3.6 V
DD
I = +6 mA
IO
2 V < V < 2.7 V
DD
.
VSS
.
VDD
Min Max Unit
0.4
V
V –0.4
DD
0.4
V
2.4
1.3
V
V –1.3
DD
0.4
V
V –0.4
DD
Table 5
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