Tbd - ST STM32F103x6 Manual

Electrical characteristics
5.3.11 Absolute maximum ratings (electrical sensitivity)
Based on three different tests (ESD, LU) using specific measurement methods, the device is
stressed in order to determine its performance in terms of electrical sensitivity.
Electrostatic discharge (ESD)
Electrostatic discharges (a positive then a negative pulse separated by 1 second) are
applied to the pins of each sample according to each pin combination. The sample size is
either 3 parts (cumulative mode) or 3 parts × (n + 1) supply pins (non-cumulative mode).
The human body model (HBM) can be simulated. The tests are compliant with JESD22-
A114A standard.
For more details, refer to the application note AN1181.
Table 27.
Symbol
V
ESD(HBM)
V
ESD(CDM)
1. TBD stands for to be determined.
2. Values based on characterization results, not tested in production.
Static latch-up
Two complementary static tests are required on six parts to assess the latch-up
performance:
A supply overvoltage is applied to each power supply pin
A current injection is applied to each input, output and configurable I/O pin
These tests are compliant with EIA/JESD 78A IC latch-up standard.
Table 28.
Symbol
LU
42/67
ESD absolute maximum ratings
Ratings
Electrostatic discharge voltage
(human body model)
Electrostatic discharge voltage
(charge device model)
Electrical sensitivities
Parameter
Static latch-up class
(1)
Conditions
= +25 °C
T
A
Conditions
= +105 °C
T
A
STM32F103xx
(2)
Maximum value Unit
2000
V

TBD

Class
II level A