Intel P4304XXMFEN2 Service Manual page 177

Intel ® Server Chassis P4304XXMFEN2/P4304XXMUXX Product Family System Integration and Service Guide
LED #
Upper Nibble
Checkpoint
Lower Nibble
Lower Nibble
Upper Nibble
AFh
Lower Nibble
Upper Nibble
07h
Lower Nibble
Upper Nibble
08h
Lower Nibble
Upper Nibble
09h
Lower Nibble
Upper Nibble
0Eh
Lower Nibble
Upper Nibble
0Fh
Lower Nibble
Upper Nibble
10h
Lower Nibble
Upper Nibble
11h
Lower Nibble
Upper Nibble
15h
Lower Nibble
Upper Nibble
19h
Lower Nibble
Upper Nibble
31h
Lower Nibble
Upper Nibble
32h
Lower Nibble
Upper Nibble
33h
Lower Nibble
Upper Nibble
4Fh
Lower Nibble
Diagnostic LED Decoder
LED 3 LED 2 LED 1 LED 0
8h
4h 2h
(MSB) (LSB)
8h
4h 2h
(MSB) (LSB)
1 1 1
1 0 1
1 1 1
0 0 0
0 1 1
0 0 0
1 0 0
0 0 0
1 0 0
0 0 0
1 1 1
0 0 0
1 1 1
PEI Phase
0 0 0
0 0 0
0 0 0
0 0 0
0 0 0
0 1 0
0 0 0
1 0 0
MRC Progress Codes
0 0 1
0 0 0
0 0 1
0 0 1
0 1 0
1 1 1
0 1 0
1 1 1
DXE Phase
1h
1h
0
0
UPI initialization done
1
0
Early SB Initialization during Sec Phase
1
0
Early NB Initialization during Sec Phase
0
0
1
0
Microcode Not Found
0
0
Microcode Not Loaded
1
1
0
1
1
1
1
1
1
1
1
1
CPU PEIM (CPU Init)
0
0
CPU PEIM (Cache Init)
1
0
1
Description
Coherency settings
End of Sec Phase
PEI Core
CPU PEIM
NB PEIM
SB PEIM
Memory Installed
DXE IPL started
159