Intel P4304XXMFEN2 Service Manual page 172

Intel ® Server Chassis P4304XXMFEN2/P4304XXMUXX Product Family System Integration and Service Guide
LED #
Upper
Nibble
Checkpoint
Lower
Nibble
Upper
Nibble
B2h
Lower
Nibble
Upper
Nibble
B3h
Lower
Nibble
Upper
Nibble
B4h
Lower
Nibble
Upper
Nibble
B5h
Lower
Nibble
Upper
Nibble
B6h
Lower
Nibble
Upper
Nibble
B7h
Lower
Nibble
Upper
Nibble
B8h
Lower
Nibble
Upper
Nibble
B9h
Lower
Nibble
Upper
Nibble
BAh
Lower
Nibble
Upper
Nibble
BBh
Lower
Nibble
154
Diagnostic LED Decoder
LED 3 LED 2 LED 1
8h
4h 2h
(MSB)
8h
4h 2h
(MSB)
ON off ON
off off ON
ON off ON
off off ON
ON off ON
off ON off
ON off ON
off ON off
ON off ON
off ON ON
ON off ON
off ON ON
ON off ON
ON off off
ON off ON
ON off off
ON off ON
ON off ON
ON off ON
ON off ON
LED 0
1h
Description
(LSB)
1h
(LSB)
ON
Gather remaining SPD data.
off
ON
Program registers on the memory
controller level.
ON
ON
Evaluate RAS modes and save rank
information.
off
ON
Program registers on the channel level.
ON
ON
Perform the JEDEC defined initialization
off
ON
Train DDR4 ranks.
ON
ON
Initialize CLTT/OLTT.
off
ON
Hardware memory test and initialization.
ON
ON
Execute software memory initialization.
off
ON
Program memory map and interleaving.
ON
sequence.