Data Transmission System Between Main-Microprocessor And Sub-Microprocessor - Sharp XG-V10WU Technical Manual

6-2. Data transmission system between main-microprocessor and
sub-microprocessor
Data transmission system
Synchronized data transmission system
8-bit/data construction
Transmission speed 230.6kbps
Sync clock is sent out from the sub-microprocessor IC2601.
Signal line
SCK0 : Sync clock (Sent out from the sub-microprocessor)
TXD0 : Data output from the main-microprocessor to the sub-microprocessor
RXD0 : Data output from the sub-microprocessor to the main-microprocessor
SHREQ : Becomes low level upon transmission request from the main-microprocessor. Normally at high level.
BINARY : Becomes low level in special data transmission system. Normally at high level.
Connections between main and sub-microprocessor
PC I/F UNIT
MAIN_CPU
IC8001
IX3270CE
165 SCK0
SCK0
171 RXD0
RXD0
164 TXD0
TXD0
207 SHREQ
AN7
BINARY
2
I C BUS
(SCL3 line)
Figure 6-5.
55
OUTPUT UNIT
60
SCLK
61
RXD0
SUB_CPU
62
TXD0
IC2601
IX3502CE
59
SH REQ
32
IN3
12
I/O4
D7
IC5304
M62320FP
XG-V10WU
XG-V10WE