Sharp XG-V10WU Technical Manual page 56

XG-V10WU
XG-V10WE
Data format
Normal data transmission system : Data (18-byte) transmission/Response (2-byte) reception
Special data transmission system : No restriction on data volume. No response received.
Normal data transmission system
Data output from main-microprocessor
1 With the pin (207) (AN7), the main-microprocessor puts the SHREQ signal line to low level and gives the transmis-
sion request to the sub-microprocessor.
2 The main-microprocessor waits until the sub-microprocessor IC2601 sends out the sync clock from the pin (60)
(SCLK).
3 Corresponding to the sync clock, the main-microprocessor IC8001 sends out the data (18-byte) from the pin (164)
(TXD0).
4 After finishing the data output, the main-microprocessor IC8001 puts the SHREQ signal line to high level.
5 The sub-microprocessor IC2601 waits for a fixed time (several ms).
6 The sub-microprocessor IC2601 sends out the response (2-byte) from the pin (61) (RXD0) same time as it send
out the sync clock from the pin (60) (SCLK).
Data output from sub-microprocessor
1 The sub-microprocessor IC2601 sends out the data (18-byte) from the pin (61) (RXD0) same time as it send out
the sync clock from the pin (60) (SCLK).
2 After finishing the data output, the sub-microprocessor IC2601 waits for a fixed time (several ms).
3 The sub-microprocessor IC2601 sends out the sync clock from the pin (60) (SCLK). Corresponding to this sync
clock, the main-microprocessor IC8001 sends out the response (2-byte) from the pin (164) (TXD0). The SHREQ
signal line is kept at high level.
(Constant regardless of the way of transmission)
(Regardless of the way of transmission)
56