Sub-Microprocessor Ic2601 (Ix3502Ce) Block Diagram - Sharp XG-V10WU Technical Manual

XG-V10WU
XG-V10WE

6-1-4. Sub-microprocessor IC2601 (IX3502CE) block diagram

Sub-clock
P63/INT13/X0A
P64/X1A
P60/INT10 ˜
P62/INT12
Main clock
X0
X1
RST
P30/PPG03/MCO
P31/SCX1 (DCK)/
LMCO
P32/S01 (U01)
P33/S11 (U11)
P34/PT02
P35/PWC
P36/PTU
P37/PT01
1KB RAM/ 2KB RAM
32KB ROM/48KB ROM
MODE, MCID1, VCC,VSS
Energy-saving
generator circuit
(32.768kHz)
Clock control
Clock pre-scaler
4
External interrupt 1
(Edge)
CMOS I/O port
Generator circuit
Clock control
Reset circuit
(Watch-dog timer)
21-bit time base
timer
6-bit PPG03
8-bit PWM timer 1
8-bit PWM timer 1
CART/SIO
PWC
CMOS I/O port
2
F MC-SL
CPU
Wild register
Other pins
Figure 6-4.
CMOS I/O port
CMOS I/O port
12-bit PPG01
12-bit PPG02
CMOS I/O port
SIO
UART
2
I C
16-bit timer/
counter 1
External interrupt 2
(Level)
CMOS I/O port
R-ch output
10-bit A/D
converter
54
8
P00/P07
8
P10/P17
P20/PMIX
P21/PPG01
P22/PPG02
P23 ˜ P27
P40/INT20/RC
P41/INT21/SCX2
P42/INT22/
S02/SD1
P43/INT23/
S12/SDM
P44/INT24/DCK2
P45/INT25/D02
P46/INT26/D12
P47/INT27/ADST
8
P50/AN0
8
˜ P57/AN1
AV
CC
AVR
AV
SS