Sharp XG-V10WU Technical Manual page 57

Normal data transmission between main and sub-microprocessor
Clock/data relations
SCK0
TXD0
(RXD0)
From main to sub
(On power supply, etc)
SCK0
TXD0
RXD0
SHREQ
From sub to main (Remote controller reception, key operation, etc)
SCK0
TXD0
RXD0
SHREQ
Data loading point
LSB Example of the data "A5"
Transmission data (18-byte)
Low level
(Insignificant data)
Transmission data (18-byte)
High level
Figure 6-6.
USB
In transmitting the response data,
the SHREQ is made high.
57
XG-V10WU
XG-V10WE
(Insignificant data)
Response data
(2-byte)
High level
Response data
(2-byte)
(Insignificant data)