Types Of Inputs; Figure 7. Input Termination For Standard And Pulsed Cmos Inputs - Silicon Laboratories Si5342 Family Reference Manual

5.2. Types of Inputs

Each of the four different inputs IN0-IN3 can be configured as standard LVDS, LVPECL, HCL, CML, and single-
ended LVCMOS formats, or as a low duty cycle pulsed CMOS format. The standard format inputs have a nominal
50% duty cycle, must be AC-coupled and use the "Standard" Input Buffer selection as these pins are internally dc-
biased to approximately 0.83 V. The pulsed CMOS input format allows pulse-based inputs, such as frame-sync
and other synchronization signals, having a duty cycle much less than 50%. These pulsed CMOS signals are DC-
coupled and use the "Pulsed CMOS" Input Buffer selection. In all cases, the inputs should be terminated near the
device input pins as shown in Figure 7. The resistor divider values given below will work with up to 1 MHz pulsed
inputs.

Figure 7. Input Termination for Standard and Pulsed CMOS Inputs

Standard AC Coupled Differential LVDS
50
3.3V, 2.5V 50
LVDS or CML
Standard AC Coupled Differential LVPECL
50
50
3.3V, 2.5V
LVPECL
Standard AC Coupled Single Ended
50
3.3V, 2.5V, 1.8V
LVCMOS
Pulsed CMOS DC Coupled Single Ended
R1
50
3.3V, 2.5V, 1.8V
LVCMOS
R1 (  ) R2 (  )
VDD
1.8V 324 665
2.5V 511 475
3.3V 634 365
Si5345-44-42-D-RM
Standard
INx
100
INx
Pulsed CMOS
Standard
INx
100
INx
Pulsed CMOS
Standard
INx
INx
Pulsed CMOS
Standard
INx
R2
INx
Pulsed CMOS
Rev. 1.0
Si5347/46
Si5347/46
Si5347/46
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