Silicon Laboratories Si5342 Family Reference Manual page 144

Si5345-44-42-D-RM
Register 0x00E2
Reg Address Bit Field
0x00E2
Register 0x00E3
Reg Address Bit Field
0x00E3
Register 0x00E4
Reg Address Bit Field
0x00E4
Register 0x00E5 Fastlock Extend Enable
Reg Address Bit Field
0x00E5
Register 0x00EA-0x00ED LOL Detection Value
Reg Address Bit Field
0x00EA
0x00EB
0x00EC
0x00ED
144
Type
7:0 R ACTIVE_NVM_BANK Read-only field indicating number of user
Type Setting Name
7:0 R/W NVM_WRITE
Type Setting Name
0 S NVM_READ_BANK
Type
5 R/W FASTLOCK_EXTEND_EN
Type
7:0 R/W FASTLOCK_EXTEND 29-bit value. Set by CBPro to minimize the
15:8 R/W FASTLOCK_EXTEND
23:16 R/W FASTLOCK_EXTEND
28:24 R/W FASTLOCK_EXTEND
Name
bank writes caried out so far.
Value
0
3
15
63
Write 0xC7 to initiate an NVM bank burn.
When set, this bit will read the NVM down
into the volatile memory.
Name
Extend Fastlock bandwidth period
past LOL Clear
0: Do not extend Fastlock period
1: Extend Fastlock period (default)
Name
phase transients when switching the PLL
bandwidth.
See FASTLOCK_EXTEND_SCL.
Rev. 1.0
Description
Description
zero
one
two
three
Description
Description
Description
Description