Clock Inputs; Inputs (In0, In1, In2, In3); Manual Input Switching; Table 8. Input Selection Configuration - Silicon Laboratories Si5342 Family Reference Manual

5. Clock Inputs

The Si5342/44/45 support 4 inputs that can be used to synchronize to the internal DSPLL.

5.1. Inputs (IN0, IN1, IN2, IN3)

The inputs accept both standard format inputs and low-duty-cycle pulsed CMOS clocks. Input selection from
CLK_SWITCH_MODE can be manual (pin or register controlled) or automatic with user definable priorities.
Register 0x052A is used to select pin or register control, and to configure the input as shown below in Table 8.
Register Name
CLK_SWITCH_MODE
IN_SEL_REGCTRL
IN_SEL

5.1.1. Manual Input Switching

In manual mode, CLK_SWITCH_MODE=0x00.
Input switching can be done manually using the IN_SEL[1:0] device pins from the package or through register
0x052A IN_SEL[2:1]. Bit 0 of register 0x052A determines if the input selection is pin selectable or register
selectable. The default is pin selectable. The following table describes the input selection on the pins. Note that
when Zero Delay Mode is enabled, the FB_IN pins will become the feedback input and IN3 therefore is not
available as a clock input. Also, in Zero Delay Mode, ZDM_EN must be set and register based input clock selection
must be done with ZDM_IN_SEL. If there is no clock signal on the selected input, the device will automatically
enter free-run or holdover mode.

Table 9. Manual Input Selection using IN_SEL[1:0] Pins

IN_SEL[1:0] DEVICE PINS
00
01
10
11

Table 8. Input Selection Configuration

Hex Address
[Bit Field]
0x0536[1:0] Selects manual or automatic switching modes. Automatic mode can be
revertive or non-revertive. Selections are the following:
00 Manual,01 Automatic non-revertive
02 Automatic revertive, 03 Reserved
0x052A [0] 0 for pin controlled clock selection
1 for register controlled clock selection
0x052A [2:1] 0 for IN0, 1 for IN1,
2 for IN2, 3 for IN3 (or FB_IN)
Zero Delay Mode Disabled
Si5345-44-42-D-RM
Function
IN0
IN1
IN2
IN3
Rev. 1.0
Zero Delay Mode Enabled
IN0
IN1
IN2
Reserved
21