U L T I PHASE EFERENCE E S I GN UIDE 1. Kit Contents The non-isolated Si825x Multi-Phase Point of Load (POL) Reference Design contains the following items: 40 Amp Si8250-based Multi-Phase POL Target Board ™ USB to SMBus Bridge Board ...
Si825x Multi-Phase POL-RD 2. Hardware Overview The Si825x Multi-Phase POL Reference Design implements a digitally-controlled POL with a DPWM (digital pulse width modulation) switching frequency of 391 kHz. The Si8250 Multi-Phase POL Target Board (Figure 1) contains system power stages and digital control circuits with debug connectors for the Si8250 digital power controller. The user can also access and control the target board using SMBus.
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Si825x Multi-Phase POL-RD 3. Si8250 Multi Phase POL Target Board Stand-Alone Operation The POL target board comes preloaded with firmware algorithms, and is designed to provide a 3.3 V output with up to 40 Amps of output current. To operate the target board as a stand-alone power supply, perform the following steps: 1.
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Si825x Multi-Phase POL-RD 4. Development/Debug Operation: Initial Hardware Setup This section describes the use of the Si8250 Multi-Phase POL Target Board with the Silicon Laboratories integrated development environment (IDE) and Application Builder tools. To configure the hardware for connection to the IDE: 1.
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Kernel and create C-code source level application software for the Si825x end application. The Application Builder directly modifies the source code in the Kernel, which is then compiled and downloaded to the Si825x. For more information on the Kernel, see application note “AN271: Si8250 Real-Time Kernel Overview”.
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Si825x Multi-Phase POL-RD 7. Download the project to the target by clicking the Download Code button in the toolbar. Note: To enable automatic downloading if the program build is successful, select Enable automatic connect/download after build in the ProjectTarget Build Configuration dialog. If errors occur during the build process, the IDE will not attempt the download.
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The Real-time Kernel provided with the Si825x Multi-Phase POL Reference Design includes optional support for PMBus. In addition, the Si825x POL design kit also comes with a PMBus Monitor application and USB to SMBus Bridge Board to manage the power supply through PMBus.
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Si825x Multi-Phase POL-RD 7. Open the Application Builder by selecting Silicon LaboratoriesSi825xApplication Builder from the PC programs menu. 8. Run the PMBus Monitor application by selecting OptionsLaunch PMBus Monitor Tool from the Application Builder. The window shown in Figure 5 will appear. The PMBus Monitor can be used to control and configure the target board.
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The use of third-party compilers and assemblers is also supported. This development kit includes the Keil Software A51 macro assembler, BL51 linker, and evaluation version C51 C compiler. These tools can be used from within the Silicon Laboratories IDE. Figure 6 shows the IDE. Figure 6. IDE 7.1.
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Laboratories IDE. To build an absolute object file using the Silicon Laboratories IDE project manager, you must first create a project. A project consists of a set of files, IDE configuration, debug views, and a target build configuration (list of files and tool configurations used as input to the assembler, compiler, and linker when building an output object file).
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The IDE can also be operated in Standard mode where SFR inspect and update is allowed only when the Si825x is not running. As shown in Figure 7, the IDE can be set for Online Debug Mode or Standard Debug mode by clicking on the circled mode switch.
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Si825x Multi-Phase POL-RD 8. Si825x Application Builder In addition to the IDE, the Si825x family is supported with an intuitive toolset that leverages traditional power supply control design methods minimizing the digital supply design learning curve. The toolset consists of a real-time firmware Kernel (C-language source code), and the Application Builder (see Figure 8).
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Refer to the Si825x data sheet for a description of the different edges. This example illustrates how to use the DPWM Timing Diagram Editor to create and simulate the timing for a single-phase POL as well as generate the initialization code in the Kernel.
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Si825x Multi-Phase POL-RD Figure 10. DPWM Timing Diagram Editor—Phase 2 3. Click the Simulate button to display the Simulate Window (see Figure 11). Use the arrows to increase and decrease the value of u(n). Notice that Phase 1’s edge should modulate with its absolute edge starting at 10 ticks.
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PWM frequency and pole/zero locations; and Si825x-specific data, such as ADC sample frequency. The simulator comes pre-populated with default values for the Si8250 Half-Bridge Target Board. These model parameters can be changed as desired to accommodate other buck topologies.
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Si825x Multi-Phase POL-RD 8.3. System Parameter Programmer The System Setting Programmer allows the designer to input all system settings (UVLO, OV, OCP, etc.) and then converts these parameters to HEX and populates the resulting initialization code in the Kernel. To open the System Settings window, open the Application Builder and select System ConfigurationSystem Settings...
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Si825x Multi-Phase POL-RD 8.4. Peripheral Configuration Wizard The Peripheral Configuration Wizard can be used to automatically generate initialization code for the Si825x’s on- chip peripherals (ADC2, comparator, UART, SMBus , etc.). The peripheral windows can be accessed by clicking on the Peripherals menu in the Application Builder. Figure 14 illustrates the Port I/O window. For more details on using this wizard, consult the “Help”...
Select OptionsConnection Options... from the IDE menu. In the Connection Options window, select USB Debug Adapter in the Serial Adapter section. Next, select C2 in the Debug Interface section. The Si825x family of devices use the Silicon Laboratories 2-wire (C2) debug interface. Press OK to close the window.
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After reset, the device operates at a frequency of 80 kHz by default using the internal low-frequency oscillator but may be configured by software to operate at other frequencies. Refer to the Si825x family data sheet for more information on configuring the system clock source. Rev. 0.2...
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Si825x Multi-Phase POL-RD 10.2. Switches and LEDs One switch is provided on the target board. Switch S1 is connected to the RESET pin of the Si8250. Pressing S1 puts the Si8250 device into its hardware-reset state. Two LEDs are also provided on the target board. The POWER IN LED is used to indicate that the POL target board is properly powered.
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Si825x Multi-Phase POL-RD 10.6. SMBus Connector (J6) The J6 connector is the SMBus interface connector for the Si8250 Multi-Phase POL Target Board. Table 6 shows the J6 pin definitions. Table 6. J6 Pin Descriptions Pin # Description DGND DGND SMBA DGND 10.7.
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Si825x Multi-Phase POL-RD 11. USB Debug Adapter The USB Debug Adapter provides the interface between the PC’s USB port and the Si825x’s in-system debug/ programming circuitry. The attached 10-pin DEBUG ribbon cable connects the adapter to the target board and the target device’s debug interface signals.
Si825x Multi-Phase POL-RD 13. Bill of Materials Table 9. Si825x Multi-Phase POL Reference Design Bill of Materials Item Reference Part Number Manufacturer Description CR1,CR2,CR3,CR4 BAS16XV2T1GOSCT-ND Digi-Key BAS16X C1,C2,C3,C4 587-1248-1-ND Digi-Key 1 uF, 25 V C10,C21,C22,C33,C41,C86, PCC2277CT-ND Digi-Key 0.1 uF, 25 V...
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Si825x Multi-Phase POL-RD Table 9. Si825x Multi-Phase POL Reference Design Bill of Materials (Continued) Item Reference Part Number Manufacturer Description R11,R10 P.10AHCT-ND Digi-Key 0R1, 5% P10GCT-ND Digi-Key 10, 5% RR08P4.02KBCT-ND Digi-Key 4.02 K, 0.1% RR08P9.31KDCT-ND Digi-Key 9.31 K, 0.5% RR08P10.2KDCT-ND Digi-Key 10.2 K, 0.5%...
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Si825x Multi-Phase POL-RD OCUMENT HANGE Revision 0.1 to Revision 0.2 Updated board photos in Figure 1, “Si8250 Multi-Phase POL Target Board,” on page 2 and Figure 2, “Board Power Configuration,” on page 3. Updated PMBus part number (Item 21) in Section "13. Bill of Materials” on page 26.
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Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where per- sonal injury or death may occur.
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