Radyne DMD15 Installation And Operation Manual page 137

User Interfaces
<1> Latched Alarm 3
<1> Latched Common
Alarm 1
<1> Latched Common
Alarm 2
<1> Backward Alarm
<4> Error Counter
<4> Test 2047 Error
Counter
<2> Raw BER Mantissa
<2> Corrected BER
Mantissa
<2> EbNo
<4> Offset Frequency
<2> Test 2047 BER
Mantissa
<1> Raw BER Exponent
<1> Corrected BER
Exponent
<1> Test 2047 BER
4-86
Bit 4 = RS Decoder Lock Fault. 1 = Fail
Bit 5 = RS De-Interleaver Fault. 1 = Fail
Bit 6 = RS Decoder Uncorrectable Word. 1 = Fail
Bit 7 = Summary Fault. 1 = Fail
Bit 0 = IF synthesizer lock detect Fault. 1 = Fail
Bit 1 = Rx Oversample PLL lock detect. 1 = Fail
Bit 2 = Buffer clock PLL lock detect. 1 = Fail
Bit 3 = Viterbi decoder lock (Not Latched)
Bit 4 = Sequential decoder lock (Not Latched)
Bit 5 = Rx 2047 test pattern lock (Not Latched)
Bit 6 = External reference PLL lock (Not Latched)
Bit 7 = IDR 96 PLL Lock. 1 = Fail
Bit 0 = -12V alarm. 1 = Fail
Bit 1 = +12V alarm. 1 = Fail
Bit 2 = +5V alarm. 1 = Fail
Bit 3 = Reserved
Bit 4 = Battery. 1 = Fail
Bit 5 = RAM and ROM alarm flag. 1 = Fail
Bits 6 and 7 = Spares
Bit 0 = M&C processor fault 1 = Fail
Bit 1 = U IO card present alarm 1 = Fail, reserved in
RCS10/10L mode
Bit 2 = IF card present alarm 1 = Fail
Bits 3 - 7 = Spares
Bit 0 = Backward Alarm 1 IDR and IBS
Bit 1 = Backward Alarm 2 IDR only
Bit 2 = Backward Alarm 3 IDR only
Bit 3 = Backward Alarm 4 IDR only
Bits 4 - 7 = Reserved
0 = No, 1 = Yes
Binary value
Binary value
Bytes 1 - 2 = Binary value Raw BER 896 = 8.96
Bytes 1 - 2 = Binary value corrected BER
Binary value, 1 decimal point implied 700 = 7.00
Binary value, 1 Hz steps
Bytes 1 - 2 = Binary value test 2047 BER
Byte 3 = Binary value exponent
Byte 3 = Binary value exponent
Byte 3 = Binary value exponent
DMD15/DMD15L IBS/IDR Satellite Modem
TM051 – Rev. 5.8