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NOTE:
Instead of specifying ambient temperature all parameters are specified for the more
meaningful silicon junction temperature. For power dissipation calculations refer
to Section A.1.8 Power Dissipation and Thermal Characteristics.
I/O, Regulator and Analog Supply Voltage
Digital Logic Supply Voltage
(1)
PLL Supply Voltage
Voltage Difference VDDX to VDDA
Voltage Difference VSSX to VSSR and VSSA
Oscillator
Bus Frequency
Operating Junction Temperature Range
NOTES:
1. The device contains an internal voltage regulator to generate the logic and PLL supply out of the I/O supply. The
absolute maximum ratings apply when this regulator is disabled and the device is powered from an external
source.
2. Some blocks e.g. ATD (conversion) and NVMs (program/erase) require higher bus frequencies for proper oper-
ation.
A.1.8 Power Dissipation and Thermal Characteristics
Power dissipation and thermal characteristics are closely related. The user must assure that the maximum
operating junction temperature is not exceeded. The average chip-junction temperature (T
obtained from:
T J
=
Junction Temperature, [ C
T A
=
Ambient Temperature, [ C
P D
=
Total Chip Power Dissipation, [W]
=
Package Thermal Resistance, [ C/W]
JA
The total power dissipation can be calculated from:
P INT
=
Chip Internal Power Dissipation, [W]
Table A-4 Operating Conditions
Rating
1
T J
=
P D
Device User Guide — 9S12C128DGV1/D V01.05
Symbol
Min
V
2.97
DD5
V
2.35
DD
V
2.35
DDPLL
-0.1
VDDX
-0.1
VSSX
f
0.5
osc
2
0.25
f
bus
T
-40
J
T A
+
P D
JA
=
P INT
+
P IO
Typ
Max
Unit
5
5.5
V
2.5
2.75
V
2.5
2.75
V
0
0.1
V
0
0.1
V
-
16
MHz
-
25
MHz
-
140
) in C can be
J
C
87
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