Motorola MC9S12C128 Manuals

Manuals and User Guides for Motorola MC9S12C128. We have 1 Motorola MC9S12C128 manual available for free PDF download: User Manual

Motorola MC9S12C128 User Manual

Motorola MC9S12C128 User Manual (136 pages)

Motorola Network Device User Guide  
Brand: Motorola | Category: Network Hardware | Size: 2.14 MB
Table of contents
Revision History2................................................................................................................................................................
Table Of Contents3................................................................................................................................................................
Overview23................................................................................................................................................................
Features23................................................................................................................................................................
Modes Of Operation25................................................................................................................................................................
Block Diagram27................................................................................................................................................................
Device Memory Map28................................................................................................................................................................
Detailed Register Map33................................................................................................................................................................
Part Id Assignments50................................................................................................................................................................
Device Pinout52................................................................................................................................................................
Signal Properties Summary55................................................................................................................................................................
Pin Initialization For 48 & 52 Pin Lqfp Bond-out Versions56................................................................................................................................................................
Detailed Signal Descriptions57................................................................................................................................................................
Extal, Xtal — Oscillator Pins57................................................................................................................................................................
Reset — External Reset Pin57................................................................................................................................................................
Test / Vpp — Test Pin57................................................................................................................................................................
Xfc — Pll Loop Filter Pin57................................................................................................................................................................
Bkgd / Taghi / Modc — Background Debug, Tag High & Mode Pin58................................................................................................................................................................
Pa[7:0] / Addr[15:8] / Data[15:8] — Port A I/o Pins58................................................................................................................................................................
Pb[7:0] / Addr[7:0] / Data[7:0] — Port B I/o Pins58................................................................................................................................................................
Pe7 / Noacc / Xclks — Port E I/o Pin 758................................................................................................................................................................
Pe6 / Modb / Ipipe1 — Port E I/o Pin 660................................................................................................................................................................
Pe5 / Moda / Ipipe0 — Port E I/o Pin 560................................................................................................................................................................
Pe4 / Eclk— Port E I/o Pin [4] / E-clock Output60................................................................................................................................................................
Pe3 / Lstrb — Port E I/o Pin [3] / Low-byte Strobe (lstrb)60................................................................................................................................................................
Pe2 / R/w — Port E I/o Pin [2] / Read/write60................................................................................................................................................................
Pe1 / Irq — Port E Input Pin [1] / Maskable Interrupt Pin61................................................................................................................................................................
Pe0 / Xirq — Port E Input Pin [0] / Non Maskable Interrupt Pin61................................................................................................................................................................
Pad[7:0] / An[7:0] — Port Ad I/o Pins [7:0]61................................................................................................................................................................
Pp[7] / Kwp[7] — Port P I/o Pin [7]61................................................................................................................................................................
Pp[6] / Kwp[6]/romctl — Port P I/o Pin [6]61................................................................................................................................................................
Pp[5:0] / Kwp[5:0] / Pw[5:0] — Port P I/o Pins [5:0]62................................................................................................................................................................
Pj[7:6] / Kwj[7:6] — Port J I/o Pins [7:6]62................................................................................................................................................................
Pm4 / Mosi — Port M I/o Pin 462................................................................................................................................................................
Pm2 / Miso — Port M I/o Pin 262................................................................................................................................................................
Pm1 / Txcan — Port M I/o Pin 162................................................................................................................................................................
Pm0 / Rxcan — Port M I/o Pin 062................................................................................................................................................................
Ps[3:2] — Port S I/o Pins [3:2]63................................................................................................................................................................
Ps1 / Txd — Port I/o Pin63................................................................................................................................................................
Ps0 / Rxd — Port I/o Pin63................................................................................................................................................................
Ppt[7:5] / Ioc[7:5] — Port T I/o Pins [7:5]63................................................................................................................................................................
Pt[4:0] / Ioc[4:0] / Pw[4:0]— Port T I/o Pins [4:0]63................................................................................................................................................................
Power Supply Pins63................................................................................................................................................................
Vddx,vssx — Power & Ground Pins For I/o Drivers63................................................................................................................................................................
Vdd1, Vdd2, Vss1, Vss2 — Internal Logic Power Pins63................................................................................................................................................................
Vdda, Vssa — Power Supply Pins For Atd And Vreg64................................................................................................................................................................
Vrh, Vrl — Atd Reference Voltage Input Pins64................................................................................................................................................................
Vddpll, Vsspll — Power Supply Pins For Pll64................................................................................................................................................................
Chip Configuration Summary65................................................................................................................................................................
Security66................................................................................................................................................................
Securing The Microcontroller67................................................................................................................................................................
Operation Of The Secured Microcontroller67................................................................................................................................................................
Unsecuring The Microcontroller67................................................................................................................................................................
Low Power Modes67................................................................................................................................................................
Stop68................................................................................................................................................................
Pseudo Stop68................................................................................................................................................................
Wait68................................................................................................................................................................
Vectors68................................................................................................................................................................
Vector Table68................................................................................................................................................................
Resets69................................................................................................................................................................
Reset Summary Table70................................................................................................................................................................
Effects Of Reset70................................................................................................................................................................
Device-specific Information70................................................................................................................................................................
Bdm Alternate Clock71................................................................................................................................................................
Extended Address Range Emulation Implications71................................................................................................................................................................
Vregen72................................................................................................................................................................
Vdd1, Vdd2, Vss1, Vss272................................................................................................................................................................
Xclks80................................................................................................................................................................
Vrl (voltage Reference Low)80................................................................................................................................................................
A.1 General83................................................................................................................................................................
A.1.1 Parameter Classification83................................................................................................................................................................
A.1.2 Power Supply83................................................................................................................................................................
A.1.3 Pins84................................................................................................................................................................
A.1.4 Current Injection84................................................................................................................................................................
A.1.5 Absolute Maximum Ratings85................................................................................................................................................................
A.1.6 Esd Protection And Latch-up Immunity86................................................................................................................................................................
A.1.7 Operating Conditions86................................................................................................................................................................
A.1.8 Power Dissipation And Thermal Characteristics87................................................................................................................................................................
A.1.9 I/o Characteristics89................................................................................................................................................................
A.1.10 Supply Currents92................................................................................................................................................................
B.1 Voltage Regulator Operating Conditions95................................................................................................................................................................
B.2 Chip Power-up And Lvi/lvr Graphical Explanation96................................................................................................................................................................
B.3 Output Loads96................................................................................................................................................................
B.3.1 Resistive Loads96................................................................................................................................................................
B.3.2 Capacitive Loads97................................................................................................................................................................
B.4 Atd Characteristics99................................................................................................................................................................
B.4.1 Atd Operating Characteristics In 5v Range99................................................................................................................................................................
B.4.2 Atd Operating Characteristics In 3.3v Range99................................................................................................................................................................
B.4.3 Factors Influencing Accuracy100................................................................................................................................................................
B.4.4 Atd Accuracy (5v Range)102................................................................................................................................................................
B.4.5 Atd Accuracy (3.3v Range)102................................................................................................................................................................
B.5 Nvm, Flash And Eeprom105................................................................................................................................................................
B.5.1 Nvm Timing105................................................................................................................................................................
B.5.2 Nvm Reliability107................................................................................................................................................................
B.6 Reset, Oscillator And Pll109................................................................................................................................................................
B.6.1 Startup109................................................................................................................................................................
B.6.2 Oscillator110................................................................................................................................................................
B.6.3 Phase Locked Loop111................................................................................................................................................................
B.7 Mscan117................................................................................................................................................................
C.1 Master Mode119................................................................................................................................................................
C.2 Slave Mode121................................................................................................................................................................
C.3 External Bus Timing123................................................................................................................................................................
C.3.1 General Muxed Bus Timing123................................................................................................................................................................
D.1 General127................................................................................................................................................................
D.2 80-pin Qfp Package128................................................................................................................................................................
D.3 52-pin Lqfp Package129................................................................................................................................................................
D.4 48-pin Lqfp Package130................................................................................................................................................................
E.1 General131................................................................................................................................................................
E.1.1 Pk[2:0] / Xaddr[16:14]132................................................................................................................................................................
E.2 112-pin Lqfp Package133................................................................................................................................................................

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