Ps[3:2] - Port S I/O Pins [3:2]; Ps1 / Txd - Port S I/O Pin 1; Ps0 / Rxd - Port S I/O Pin 0; Ps0 / Rxd — Port I/O Pin - Motorola MC9S12C-Family User Manual

Motorola network device user guide
Table of Contents

Advertisement

Device User Guide — 9S12C128DGV1/D V01.05
2.3.27 PS[3:2] — Port S I/O Pins [3:2]
PS3 and PS2 are general purpose input or output pins. These pins are not available in the 48 / 52 pin
package versions.
2.3.28 PS1 / TXD — Port S I/O Pin 1
PS1 is a general purpose input or output pin and the transmit pin, TXD, of Serial Communication Interface
(SCI).
2.3.29 PS0 / RXD — Port S I/O Pin 0
PS0 is a general purpose input or output pin and the receive pin, RXD, of Serial Communication Interface
(SCI).
2.3.30 PPT[7:5] / IOC[7:5] — Port T I/O Pins [7:5]
PT7-PT5 are general purpose input or output pins. They can also be configured as the timer system input
capture or output compare pins IOC7-IOC5.
2.3.31 PT[4:0] / IOC[4:0] / PW[4:0]— Port T I/O Pins [4:0]
PT4-PT0 are general purpose input or output pins. They can also be configured as the timer system input
capture or output compare pins IOC4-IOC0 or as the PWM outputs PW[4:0].

2.4 Power Supply Pins

2.4.1 VDDX,VSSX — Power & Ground Pins for I/O Drivers
External power and ground for I/O drivers. Bypass requirements depend on how heavily the MCU pins
are loaded.
2.4.2 VDDR, VSSR — Power & Ground Pins for I/O Drivers & for Internal
Voltage Regulator
External power and ground for the internal voltage regulator. Connecting VDDR to ground disables the
internal voltage regulator.
2.4.3 VDD1, VDD2, VSS1, VSS2 — Internal Logic Power Pins
Power is supplied to the MCU through VDD and VSS. This 2.5V supply is derived from the internal
voltage regulator. There is no static load on those pins allowed. The internal voltage regulator is turned
off, if VDDR is tied to ground.
63

Advertisement

Table of Contents
loading

Table of Contents