Section 9 Clock Reset Generator (Crg) Block Description; Device-Specific Information; Figure 8-6 Recommended Pcb Layout For 80Qfp Pierce Oscillator - Motorola MC9S12C-Family User Manual

VDD1
C1
VSS1

Figure 8-6 Recommended PCB Layout for 80QFP Pierce Oscillator

Section 9 Clock Reset Generator (CRG) Block Description

Consult the CRG Block User Guide for information about the Clock and Reset Generator module.

9.1 Device-specific information

The CRG is part of the IPBus domain.
VSSX
VSSR
VDDR
VSSPLL
VDDPLL
R1
Device User Guide — 9S12C128DGV1/D V01.05
C3
VSSA
VDDA
VSS2
C2
VDD2
VSSPLL
R3
R2
Q1
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