Motorola MC9S12GC Series Manuals

Manuals and User Guides for Motorola MC9S12GC Series. We have 1 Motorola MC9S12GC Series manual available for free PDF download: User Manual

Motorola MC9S12GC Series User Manual (136 pages)

Motorola Network Device User Guide

Brand: Motorola | Category: Network Hardware | Size: 2.14 MB

Revision History
2
Table of Contents
3
Table 0-2 MC9S12C-Family Package Option Summary
15
Table 0-1 List of MC9S12C and MC9S12GC Family Members
15
Figure 0-1 Order Part Number Coding
16
Table 0-3 MC9S12C-Family Part Number Coding
16
Table 0-4 MC9S12GC-Family Part Number Coding
19
Table 0-5 Document References
21
Section 1 Introduction

23
Section 2 Signal Description

52
Section 3 System Clock Description

64
Section 4 Modes of Operation

65
- Overview
  65
- Chip Configuration Summary
  65
- Figure 3-1 Clock Connections
  65
- Security
  66
- Securing the Microcontroller
  67
- Operation of the Secured Microcontroller
  67
- Unsecuring the Microcontroller
  67
- Low Power Modes
  67
- Stop
  68
- Pseudo Stop
  68
- Wait
  68
- Run
  68
Section 5 Resets and Interrupts

68
- Overview
  68
- Vectors
  68
- Vector Table
  68
- Resets
  69
- Reset Summary Table
  70
- Effects of Reset
  70
Section 6 HCS12 Core Block Description

70
- Device-Specific Information
  70
- Ppage
  70
- BDM Alternate Clock
  71
- Extended Address Range Emulation Implications
  71
Section 7 Voltage Regulator (VREG) Block Description

72
- Device-Specific Information
  72
- Vregen
  72
- Vdd1, Vdd2, Vss1, Vss2
  72
Section 8 Recommended Printed Circuit Board Layout

72
Section 9 Clock Reset Generator (CRG) Block Description

79
Section 10 Oscillator (OSC) Block Description

80
Section 11 Timer (TIM) Block Description

80
Section 12 Analog to Digital Converter (ATD) Block Description

80
- Device-Specific Information
  80
- VRL (Voltage Reference Low)
  80
Section 13 Serial Communications Interface (SCI) Block Description

80
Section 14 Serial Peripheral Interface (SPI) Block Description

80
Section 16 RAM Block Description

81
Section 17 Pulse Width Modulator (PWM) Block Description

81
Section 18 MSCAN Block Description

81
Section 19 Port Integration Module (PIM) Block Description

81
Appendix A Electrical Characteristics

83
- General
  83
- Parameter Classification
  83
- Power Supply
  83
  - A.1 General
    83
  - A.1.1 Parameter Classification
    83
  - A.1.2 Power Supply
    83
- Pins
  84
- Current Injection
  84
  - A.1.3 Pins
    84
  - A.1.4 Current Injection
    84
- Absolute Maximum Ratings
  85
- ESD Protection and Latch-Up Immunity
  86
- Operating Conditions
  86
- A.1.7 Operating Conditions
  86
- Power Dissipation and Thermal Characteristics
  87
- I/O Characteristics
  89
- A.1.9 I/O Characteristics
  89
- Supply Currents
  92
- A.1.10 Supply Currents
  92
Appendix B Electrical Specifications

95
- Voltage Regulator Operating Conditions
  95
- Chip Power-Up and LVI/LVR Graphical Explanation
  96
- Output Loads
  96
- Resistive Loads
  96
- Capacitive Loads
  97
- B.3.2 Capacitive Loads
  97
- ATD Characteristics
  99
- B.4 ATD Characteristics
  99
- ATD Operating Characteristics in 5V Range
  99
- ATD Operating Characteristics in 3.3V Range
  99
- Factors Influencing Accuracy
  100
- ATD Accuracy (5V Range)
  102
- ATD Accuracy (3.3V Range)
  102
- Figure B-2 ATD Accuracy Definitions
  104
- NVM, Flash and EEPROM
  105
- NVM Timing
  105
- B.5.1 NVM Timing
  105
- NVM Reliability
  107
- B.5.2 NVM Reliability
  107
- Reset, Oscillator and PLL
  109
- Startup
  109
- B.6.1 Startup
  109
- Oscillator
  110
- B.6.2 Oscillator
  110
- Phase Locked Loop
  111
- Figure B-3 Basic PLL Functional Diagram
  112
- Figure B-4 Jitter Definitions
  114
- Figure B-5 Maximum Bus Clock Jitter Approximation
  114
- Mscan
  117
- B.7 Mscan
  117
- Spi
  119
Appendix C Electrical Specifications

119
- Master Mode
  119
- Figure C-1 SPI Master Timing (CPHA=0)
  119
- C.1 Master Mode
  119
- Figure C-2 SPI Master Timing (CPHA=1)
  120
- Slave Mode
  121
- Figure C-3 SPI Slave Timing (CPHA=0)
  121
- C.2 Slave Mode
  121
- Figure C-4 SPI Slave Timing (CPHA=1)
  122
- External Bus Timing
  123
- General Muxed Bus Timing
  123
- Figure C-5 General External Bus Timing
  123
Appendix D Package Information

127
- General
  127
- D.1 General
  127
- 80-Pin QFP Package
  128
- Figure D-1 80-Pin QFP Mechanical Dimensions (Case No. 841B)
  128
- 52-Pin LQFP Package
  129
- Figure D-2 52-Pin LQFP Mechanical Dimensions (Case No. 848D-03)
  129
- 48-Pin LQFP Package
  130
Appendix E Emulation Information

131
- General
  131
- E.1 General
  131
- Pk[2:0] / Xaddr[16:14]
  132
- E.1.1 Pk[2:0] / Xaddr[16:14]
  132
- 112-Pin LQFP Package
  133

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Motorola MC9S12GC Series Manuals

Motorola MC9S12GC Series User Manual (136 pages)

Table of Contents

Section 1 Introduction

Section 2 Signal Description

Section 3 System Clock Description

Section 4 Modes of Operation

Section 5 Resets and Interrupts

Section 6 HCS12 Core Block Description

Section 7 Voltage Regulator (VREG) Block Description

Section 8 Recommended Printed Circuit Board Layout

Section 9 Clock Reset Generator (CRG) Block Description

Section 10 Oscillator (OSC) Block Description

Section 11 Timer (TIM) Block Description

Section 12 Analog to Digital Converter (ATD) Block Description

Section 13 Serial Communications Interface (SCI) Block Description

Section 14 Serial Peripheral Interface (SPI) Block Description

Section 16 RAM Block Description

Section 17 Pulse Width Modulator (PWM) Block Description

Section 18 MSCAN Block Description

Section 19 Port Integration Module (PIM) Block Description

Appendix A Electrical Characteristics

Appendix B Electrical Specifications

Appendix C Electrical Specifications

Appendix D Package Information

Appendix E Emulation Information

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