Page 4
1.5
Specifications (continued)
1.5.2
1.5.2
1.5.3
Rev.: 1.0
Analog Recording Inputs (continued)
1.5.2.3
Digital Downconverter
• Type: Virtex−6 FPGA, Pentek DDC IP core
• Decimation (D): 2 to 65,536
• IF Center Frequency Tuning: DC to ƒ
• DDC Usable Bandwidth: 0.4*ƒ
Analog Recording Inputs (continued)
1.5.2.4
Sample and Reference Clocks
• External Sample Clock: Sine wave, 0 to +10 dBm, AC−
coupled, 50 ohms 20 to 500 MHz, common to all A/Ds
• VCXO Sample Clock: Programmable, 20 to 500 MHz, phase−
locked to 10 MHz reference, common to all A/Ds
• Reference Clock: Sine wave, 0 to +10 dBm, AC−coupled, 50
ohms, 10 MHz, used for phase−locking the VCXO
• Connector Type: Rear panel female SMA connector for
external sample or reference clock input
1.5.2.5
External Trigger
• Number: One common trigger for all input channels
• Input Level: LVTTL with selectable rising or falling edge
• Connector Type: Rear panel female SMA connector
Analog Playback Outputs
1.5.3.1
Analog Signal Outputs
• Output Type: Rear−panel female SMA connectors
• Full Scale Output: +4 dBm into 50 ohms
• 3 dB Passband: 300 kHz to 700 MHz
Talon RTX 2767 Operating Manual
, 32 bits
s
/D
s