Intel Embedded Intel486 Hardware Reference Manual page 327

PHYSICAL DESIGN AND SYSTEM DEBUGGING
caused the operand transfer. Reporting is provided by forcing the Intel486 processor execution
unit to wait for the completion of data operand transfers before beginning execution of the next
instruction.
When the Intel486 processor switches to a new task, the LE bit is cleared. Thus, LE enables fast
switching from one task to another task. To avoid having exact data breakpoint match enabled in
the new task, the LE bit is cleared by the processor during the task switch. Note that exact data
breakpoint match must be re-enabled under software control.
The GE bit supports exact data breakpoint match that is to remain enabled during all tasks exe-
cuting in the system. The Intel486 processor GE bit is unaffected during a task switch.
NOTE
Note that instruction execution breakpoints are always reported.
G, L (breakpoint enable, global and local). Associated breakpoints are enabled when either G or
th
L are set. When this happens the Intel486 processor detects the i breakpoint condition, then the
exception 1 handler is invoked.
Debug status register. A debug status register, DR6 allows the exception 1 handler to easily de-
termine why it was invoked. Exception 1 handler can be invoked as a result of one of the several
events as documented in the Intel486 processor datasheets. This register contains single-bit flags
for each of the possible events invoking exception 1. Some of these events are faults while others
are traps.
10.8.6 Debugging Overview
Once the Intel486 processor-based system is designed and the printed circuit board is fabricated
and stuffed, the next step is to debug the hardware in increments.
The design of a microprocessor-based system can be subdivided into several phases. The design
starts with preparation of the system specification followed by conceptual representation in the
form of block diagram. The next phase is implementing the design, which consists of the hard-
ware design and the software design occurring in parallel. Hardware debugging usually begins
by testing the system with short test programs. Initially the power and ground lines are tested for
opens and shorts followed by the testing of the reset function. After the hardware passes these
programs, the hardware/software integration phase begins. The test programs are then replaced
by the application software and complete system is debugged.
When there are both hardware and software problems, it can be difficult to isolate each. Several
types of testing systems are available to assist in this process. The most common type is the in-
circuit emulator, which plugs into the microprocessor socket and allows the operation of the sys-
tem to be controlled and monitored. In-circuit emulators usually include memory that can be used
in place of the prototype memory. Another useful test tool is the logic analyzer, which captures
the "trace" of the bus activity and displays the sequence of bus cycles that were executed. Most
in-circuit emulators also provide this function, which is invaluable for both hardware and soft-
ware debugging. Test programs can be run from an ICE or a monitor.
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