16-Bit I/O Interface - Intel Embedded Intel486 Hardware Reference Manual

EMBEDDED Intel486™ PROCESSOR HARDWARE REFERENCE MANUAL
Intel486™ Processor
BE3# BE2# BE1# BE0#
0 1 1
1 1 1
0 0 0
1 0 0
0 1 0
1 1 0
0 0 1
1 0 1
0 1 1
1 1 1
Inputs
NOTES:
1. X implies "do not care" (either 0 or 1).
2. BHE# (byte high enable) is not needed in 8-bit interface.
†
3. indicates a non-occurring pattern of byte enables; either none are asserted or the pattern has byte
enables asserted for non-contiguous bytes.
7.1.3.3

16-Bit I/O Interface

16-bit I/O interface byte swap logic requires six 8-bit bidirectional I/O data buffers as shown in
Figure 7-5. Buffers 3 through 0 are controlled by BE3#–BE0# respectively. Buffers 4 and 5 are
monitored by BEN16#.
To transfer data on the lower 16-bits, buffers 2 and 3 are enabled. While the higher 16-bits are
transferred through Buffer 0, 1, 4, and 5.
7-10
Table 7-5. 32-Bit to 8-Bit Steering (Sheet 2 of 2)
(3)
BEN16# BEN8UH#
†
0 1 1
0 1 1
1 1 1
1 1 1
†
1 1 1
1 1 1
1 1 1
1 1 1
1 1 0
1 1 1
(1)
8-Bit Interface
BEN8UL# BEN8H#
1 1
1 1
1 1
1 0
1 0
1 0
0 0
0 1
1 1
1 1
Outputs
(2)
BHE# A1 A0
X X X
X 0 0
X 0 1
X 0 1
X X X
X 0 1
X 1 0
X 1 0
X 1 1
X X X