Cmp/Cmpl - Omron SYSMAC CP Series Instruction & Reference Manual

CMP/CMPL

Instruction
COMPARE
DOUBLE COMPARE
Symbol
Applicable Program Areas
Area
Usage
Operands
Operand
CMP: Comparison data 1
S1
CMPL: Comparison data 1, rightmost word address
CMP: Comparison data 2
S2
CMPL: Comparison data 2, rightmost word address
Operand Specifications
Word addresses
Area
CIO WR HR
S1, S2 OK OK OK
Flags
Name
Error Flag
Greater Than Flag
Greater Than or Equal Flag
Equal Flag
Not Equal Flag
Less Than Flag
Less Than or Equal Flag
Negative Flag
CP1E CPU Unit Instructions Reference Manual(W483)
Mnemonic Variations
CMP !CMP
CMPL ---
CMP
CMP(020)
S
1
S : Comparison data 1
1
S
2
S : Comparison data 2
2
Step program areas
OK
Description
AR T C DM
OK OK OK OK
CX-Programmer
label
P_ER Unchanged
P_GT • ON if S > S
1
• OFF in all other cases.
≥ S
P_GE • ON if S
1
• OFF in all other cases.
P_EQ • ON if S = S
1
• OFF in all other cases.
≠ S
P_NE • ON if S
1
• OFF in all other cases.
P_LT • ON if S < S
1
• OFF in all other cases.
≤ S
P_LE • ON if S
1
• OFF in all other cases.
P_N Unchanged
Function
code
Compares two unsigned binary values (constants
and/or the contents of specified words) and out-
020
puts the result to the Arithmetic Flags in the Auxil-
iary Area.
Compares two double unsigned binary values
(constants and/or the contents of specified words)
060
and outputs the result to the Arithmetic Flags in
the Auxiliary Area.
Subroutines
OK
Data type
CMP
UINT
UINT
Indirect DM addresses
Constants
@DM *DM
OK OK OK
Operation
CMP
Unchanged
. • ON if S
2
• OFF in all other cases.
. • ON if S
2
• OFF in all other cases.
. • ON if S
2
• OFF in all other cases.
. • ON if S
2
• OFF in all other cases.
. • ON if S
2
• OFF in all other cases.
. • ON if S
2
• OFF in all other cases.
Unchanged
2 Instructions
Function
CMPL
CMPL(060)
S
1
S : Comparison data 1
1
S
2
S : Comparison data 2
2
Interrupt tasks
OK
Size
CMPL CMP
UDINT 1
UDINT 1
CF Pulse bits
--- ---
CMPL
+1, S > S +1, S .
1 1 2 2
≥ S
+1, S +1, S .
1 1 2 2
+1, S = S +1, S .
1 1 2 2
≠ S
+1, S +1, S .
1 1 2 2
+1, S < S +1, S .
1 1 2 2
≤ S
+1, S +1, S .
1 1 2 2
2
CMPL
2
2
TR bits
---
2-95