Table of Contents
Advertisement
Main memory
Independent Channel mode with different DIMMs - 2 CPUs populated
CPU
CPU1
ctrl.
iMC1
channel F
E
1
2
1
2
socket
F
F
E
E
#DIMM
2 CPUs populated
s
(1/1)
2
3
(2/2)
4
5
(3/3)
z
6
7
(4/4)
z
8
9
(6/4)
z
z
10
11
(6/6)
z
z
12
13
(8/6)
z
z
14
15
(12/4)
z
z
16
17
(12/6)
z
z
z
z
18
19
(12/8)
z
z
z
z
20
21
22
z
z
z
z
(12/10)
23
24
z
z
z
z
(12/12)
246
iMC0
D
A
B
C
1
2
2
1
2
1
2
D
D
A
A
B
B
C
x
z
x
z
x
x
z
x
x
z
x
x
z
x
x
z
z
x
x
x
x
z
z
x
x
x
x
z
z
x
x
x
x
x
z
z
x
x
x
x
x
z
z
x
x
x
x
x
z
z
x
x
x
x
x
Upgrade and Maintenance Manual
CPU2
iMC1
M (F)
L (E)
K (D)
1
1
2
1
2
1
2
C
M
M
L
L
K
K
z
z
z
z
x
z
z
x
z
z
z
z
z
z
z
z
z
z
x
z
z
z
x
z
z
z
z
x
z
z
z
z
z
x
z
z
z
z
z
z
iMC0
G (A)
H (B)
J (C)
2
1
2
1
2
1
G
G
H
H
J
J
z
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
RX4770 M5
Advertisement
Table of Contents
