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9132A Service
enables the select and chip enable on
where the UUT ROM
ZIF socket, data lines from the ROM
lines to
J1
All pin signals from the UUT boot
ZIF socket, except for pins
enable or output enable, depending on the ROM
The address lines from the UUT pass through one of the protection hybrids
(Al or A2) and a buffer (U3, U4, U5). The output of the buffer then drives
through a back-terminating resistor,
the 9132A Main Board.
The ROM Module PAL
ROM is
an
active high or
is
Al
(protected signals from the UUT ROM).
forms a ROM select output that makes
enables active. This also determines the outputs for pins 22 and 24 of the
ZIF socket.
Other inputs
The
RUNUUT
and enable the ROM select outputs to the ZIF pins.
PWRFAIL,
The PWRFAIL line on the PAL
called RAWPWRFAIL.
ROM plug adapter (e.g., pin
adapter). The VCC or power pin
goes through a resistor divider consisting of
pin
12,
through the protection hybrid
resistor is called PROTPWRFAIL.
ed
PWRFAIL. From there the signal goes to
When the fuse
PWRFAIL. (One side of the fuse is tied to
tied to
is
ZIF socket, which
pulled high, the fuse
can
be
fuse sense line is identical to UUT ground.)
Three lines on
ROMTYPE3).
Module and are either grounded or left open on
the table on the ROM Module schematic for the decoding for ROM type.
ROM
Plug Adapters
The ROM plug adapter schematic diagrams are shown
The various ROM plug adapters (connected
Module) adapt the end of
is
plugged
and
J2.
and
22
determines whether any given
(U2)
output enable or chip
The PAL also inputs PROTPIN22, 24,
low.
the PAL include RUNUUT, PWRFAIL, and PFUSESENSE.
to
signal
tells the PAL
disables
the ROM Module
RAWPWRFAIL is connected to VCC through the
of J3 to pin
24
Al.
line becomes active, it performs
sense
the grounds
the
all
on
also tied
is
to
blown,
is
determine ROM type (ROMTYPEI, ROMTYPE2, and
J1
These lines are connected
the
micro ribbon cables
of the ZIF socket
and
pin 22
24
When these two pins are enabled
in.
the socket are placed
in
connected directly to the
socket
ROM
are
pins usually used for chip
These
24.
are
in
the ZIF socket.
type
out J3
and
and then
whether the polarity of the pin
select, and
With these signals, the PAL
the chip enables and output
all
ERAM data buffer
disable
the
to
the outputs.
tri-stating
all
by
derived from a signal from the UUT cable
is
of J2
2
on
UUT enters the ROM Module at J2
on the
RS and
The signal coming out of
This signal goes through U3 and is
PAL and out I3 to the
the
Pod ground. The other side
the
the UUT and the ground from the
lines to
+5V through
pull-up resistor. If this line
a
the fuse sense line goes
and
pull-up resistors
to
ROM plug adapter.
the
in
Figure
and J2 of the ROM
to J1
the correct pins on the
to
(J5),
the
on
the data
on
J4 to the Pod
and
on the UUT
pin
and 29 from
28,
(U1)
The power fail
line,
the 24-pin ROM plug
R3, and
then
the
protection
same function
the
as
The
high.
the ROM
in
See
2-12.
5-6.
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