IEI Technology PCISA-9652 User Manual page 204

protocols used to enable electronic devices to wirelessly communicate
with each other.
L1 Cache The Level 1 Cache (L1 Cache) is a small memory cache built into the
system processor.
L2 Cache The Level 2 Cache (L2 Cache) is an external processor memory cache.
LCD Liquid crystal display (LCD) is a flat, low-power display device that
consists of two polarizing plates with a liquid crystal panel in between.
LVDS Low-voltage differential signaling (LVDS) is a dual-wire, high-speed
differential electrical signaling system commonly used to connect LCD
displays to a computer.
MAC The Media Access Control (MAC) protocol enables several terminals or
network nodes to communicate in a LAN, or other multipoint networks.
PCIe PCI Express (PCIe) is a communications bus that uses dual data lines
for full-duplex (two-way) serial (point-to-point) communications between
the SBC components and/or expansion cards and the SBC chipsets.
Each line has a 2.5 Gbps data transmission rate and a 250 MBps
sustained data transfer rate.
POST The Power-on Self Test (POST) is the pre-boot actions the system
performs when the system is turned-on.
RAM Random Access Memory (RAM) is volatile memory that loses data
when power is lost. RAM has very fast data transfer rates compared to
other storage like hard drives.
SATA Serial ATA (SATA) is a serial communications bus designed for data
transfers between storage devices and the computer chipsets. The
SATA bus has transfer speeds up to 1.5 Gbps and the SATA II bus has
data transfer speeds of up to 3.0 Gbps.
S.M.A.R.T Self Monitoring Analysis and Reporting Technology (S.M.A.R.T) refers
Page 184
PCISA-9652 Half-Size CPU Card