NEC MultiSync LCD2080UX -BKA Service Manual page 128

CIRCUIT DESCRIPTION
TABLE OF CONTENTS
1. Outlined Software Descriptions ............................................................................................. 7-3
2. Circuit Block Descriptions ...................................................................................................... 7-4
2.1 Analog Signal Input Circuit .................................................................................................. 7-4
2.1.1 Analog Signal Processor Circuit (Descriptions Only for G ch on the DVI-I Side) .................. 7-4
2.1.2 SOG Sync Separator Circuit ......................................................................................... 7-4
2.1.3 Sync Signal Changeover Circuit ................................................................................... 7-4
2.2 AD Converter ....................................................................................................................... 7-5
2.3 Digital Signal Input Block ..................................................................................................... 7-5
2.4 IC4A1 Signal Processor Block ............................................................................................. 7-5
2.5 Scalar (IC401) and Peripheral Circuits ................................................................................ 7-6
2.5.1 Internal Block Diagram of IC401 ................................................................................... 7-6
2.5.2 LVDS ............................................................................................................................. 7-6
2.5.3 Clock Generator Circuit ................................................................................................. 7-6
2.5.4 Flash Memory ............................................................................................................... 7-6
2.6 MPU and Peripheral Circuits ............................................................................................... 7-7
2.6.1 Reset Circuit (1) .............................................................................................................. 7-7
2.6.2 Reset Circuit (2) ............................................................................................................ 7-7
2.6.3 EEPROM ....................................................................................................................... 7-7
2.7 DDC ..................................................................................................................................... 7-7
2.7.1 INPUT1 (IC8A1, IC8A2) ................................................................................................ 7-7
2.7.2 INPUT2 (IC8F1) ............................................................................................................ 7-7
2.7.3 DDC-CI .......................................................................................................................... 7-7
2.7.4 Auto DVI Selection ........................................................................................................ 7-8
2.7.5 EDID DATA read/write ................................................................................................... 7-9
2.8 POWER SW circuit .............................................................................................................. 7-10
7-1
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