Plx Pci9656 Initialisation; Pci Registers - Alpha Data ADM-XRC-II User Manual

9.

PLX PCI9656 Initialisation

The PCI9656 is configured at power-up and reset by a serial EEPROM
attached to it. This device is configured at the factory with settings to suit the
standard operation of the ADM-XRC-II. For the values in the EEPROM, see
the following chapter.
After reset, the PCI9656 loads initial settings for PCI and other registers from
the EEPROM. The following sections show the PCI9656 registers after
booting on a system with a PCI BIOS.
9.1.

PCI Registers

The PCI9656 PCI registers are accessed in PCI configuration space primarily
during system boot to configure resources requested by the ADM-XRC-II.
The main points to note are that the device and vendor ID's are 9656/10B5
and the command register is set for memory and I/O access.
BAR0(10h) is allocated to 32 bit memory space and is used for access to all
of the PCI9656 control registers. BAR1(14h) is allocated to I/O space and is
used for the same purpose as BAR1.
BAR2 defines the PCI9656 Local Bus address range Space 0 (S0) and is
allocated to 32 bit memory space. BAR3 maps a similar amount to BAR2 and
is used for access to Space 1 (S1).
It is important to note that as far as PCI space is concerned, there is no
difference between S0 and S1. The Local Bus registers define the operation
of these spaces.
ADM-XRC-II User Manual
ADM-XRC-II User Manual
Version 1.5
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