Signal
5.9.2. User I/O XRM IO146 Panel Variant – Rev2.0
There are 146 I/O signals available on the front panel connector and these
can be used individually or in pairs. Each pair of I/O signals is routed as
shown below.
FPGA
User[0]
User[1]
User[2]
User[3]
The default manufacturing option is Rs=0R and Rt not fitted. Other options are
available. Rs can be used to provide series damping in point to point
applications but for LVDS is 0R. Rt is required for LVDS inputs to provide the
termination voltage from the line current.
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
All GND
21
22
23
24
25
26
27
28
29
30
31
32
33
34
Rt
Rs
Rs
Rt
Rs
Rs
ADM-XRC-II User Manual
Pin
Signal
35
USER[0]
36
USER[1]
37
USER[2]
38
USER[3]
39
USER[4]
40
USER[5]
41
USER[6]
42
USER[7]
42
USER[8]
44
USER[9]
45
USER[10]
46
USER[11]
47
USER[12]
48
USER[13]
49
USER[14]
50
USER[15]
51
USER[16]
52
USER[17]
53
USER[18]
54
USER[19]
55
USER[20]
56
USER[21]
57
USER[22]
58
USER[23]
59
USER[24]
60
USER[25]
61
USER[26]
62
USER[27]
63
USER[28]
64
USER[29]
65
USER[30]
66
USER[31]
67
USER[32] -CLK
68
USER[33] -CLK
IO CON
ADM-XRC-II User Manual
Version 1.5
Page 15
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