Lvds Interface (J26); Table 3-24. Lvds Interface Pin/Signal Descriptions (J26) - Ampro LittleBoard800 Reference Manual

Chapter 3

LVDS Interface (J26)

Table 3-24 describes the pin-outs and signals of the LVDS interface and it has 30 pins, 2 rows, odd/even,
(1, 2) with 2mm pin spacing header.

Table 3-24. LVDS Interface Pin/Signal Descriptions (J26)

Pin # Signal
1 +12V
2 +VCC (+3.3V/+5V)
3 GND
4 GND
5 CLK_LVDS_IYBP
6 CLK_LVDS_IYBM
7 LVDS_IYBP3
8 LVDS_IYBM3
9 LVDS_IYBP2
10 LVDS_IYBM2
11 LVDS_IYBP1
12 LVDS_IYBM1
13 LVDS_IYBP0
14 LVDS_IYBM0
15 LVDS_PANELBKLTCTL Control Panel Backlight
16 LVDS_PANELVDDEN
17 CLK_LVDS_IYAP
18 CLK_LVDS_IYAM
19 LVDS_IYAP3
20 LVDS_IYAM3
21 LVDS_IYAP2
22 LVDS_IYAM2
23 LVDS_IYAP1
24 LVDS_IYAM1
25 LVDS_IYAP0
26 LVDS_IYAM0
27 DDCPCLK
28 DDCPDATA
29 LVDS_PANELBKLTEN
30 NC
Note: The shaded area denotes power or ground.
NOTE
Pins 5-14 constitute 2
15-26 constitute 1
channel interface.
LittleBoard 800
Description
+12 volt input
JP1 determines voltage on pin
Ground
Ground
Clock Positive Output
Clock Negative Output
Data Positive Output
Data Negative Output
Data Positive Output
Data Negative Output
Data Positive Output
Data Negative Output
Data Positive Output
Data Negative Output
Enable Panel Power
Clock Positive Output
Clock Negative Output
Data Positive Output
Data Negative Output
Data Positive Output
Data Negative Output
Data Positive Output
Data Negative Output
Data Positive Output
Data Negative Output
Display Data Channel Clock
Display Data Channel Data
Enable Backlight Inverter
Not Connected
nd
channel interface of two channels. Pins
st
channel interface of two channels, or a single
Reference Manual
Hardware
Line Channel
NA NA
Clock
3
Channel 2
2
1
0
NA NA
NA NA
Clock
3
Channel 1
2
1
0
NA NA
NA NA
NA NA
NA NA
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