Lvds Interface (J14); Table 3-17. Lvds Interface Pin/Signal Descriptions (J14) - Ampro ReadyBoar 800 Reference Manual

Chapter 3

LVDS Interface (J14)

Table 3-17. LVDS Interface Pin/Signal Descriptions (J14)

Pin # Signal
1 +12V
2 VCC_LCD
3 GND
4 GND
5 LVDSB_Clk+
6 LVDSB_Clk-
7 LVDSB_Y3+
8 LVDSB_Y3-
9 LVDSB_Y2+
10 LVDSB_Y2-
11 LVDSB_Y1+
12 LVDSB_Y1-
13 LVDSB_Y0+
14 LVDSB_Y0-
15 LVD_BKLTCtl
16 LVD_EN
17 LVDSB_Clk+
18 LVDSB_Clk-
19 LVDSB_Y3+
20 LVDSB_Y3-
21 LVDSB_Y2+
22 LVDSB_Y2-
23 LVDSB_Y1+
24 LVDSB_Y1-
25 LVDSB_Y0+
26 LVDSB_Y0-
27 LVDS_DDCPClk
28 LVDS_DDCPData Data
29 LVD_BKLEN
30 NC
Notes: The shaded area denotes power or ground.
ReadyBoard 800
Description Line Channel
+12V source
+5V source
Ground Gnd
Ground
Clock Positive Output Clk
Clock Negative Output
Data Positive Output 3
Data Negative Output
Data Positive Output 2
Data Negative Output
Data Positive Output 1
Data Negative Output
Data Positive Output 0
Data Negative Output
Backlight Control
LCD enable
Data Positive Output Clk
Data Negative Output
Data Positive Output 3
Data Negative Output
Data Positive Output 2
Data Negative Output
Data Positive Output 1
Data Negative Output
Data Positive Output 0
Data Negative Output
Clock
Backlight Enable
Not connected
Reference Manual
NOTE Pins 5-14
constitute 1st
channel interface
of two channels,
or a single
channel interface.
Pins 17-26
constitute 2nd
channel interface
of two channels.
Channel 1
Channel 2
Hardware
49