Lvds Interface; Table 3-26. Lvds Interface Pin/Signal Descriptions (J31) - Ampro Little Board 700 Reference Manual

Table of Contents

Advertisement

Chapter 3

LVDS Interface

Table 3-26. LVDS Interface Pin/Signal Descriptions (J31)

Pin # Signal
1
3.3V_Panel
2
5V_Panel
3
GND
4
GND
5
LVDS_Y0M
6
LVDS_Y0P
7
LVDS_Y1M
8
LVDS_Y1P
9
LVDS_Y2M
10
LVDS_Y2P
11
LVDS_CLKYM
12
LVDS_CLKYP
13
LVDS_Z0M
14
LVDS_Z0P
15
LVDS_Z1M
16
LVDS_Z1P
17
LVDS_Z2M
18
LVDS_Z2P
19
LVDS_CLKZM
20
LVDS_CLKZP
Notes: The shaded area denotes power or ground.
NOTE
Pins 5-12 constitute 1
single channel interface. Pins 13-20 constitute 2nd channel
interface of two channels.
LittleBoard 700
Description
+3.3V source
+5V source
Ground
Ground
Data Negative Output
Data Positive Output
Data Negative Output
Data Positive Output
Data Negative Output
Data Positive Output
Clock Negative Output
Clock Positive Output
Data Negative Output
Data Positive Output
Data Negative Output
Data Positive Output
Data Negative Output
Data Positive Output
Clock Negative Output
Clock Positive Output
st
channel interface of two channels, or a
Reference Manual
Line
Channel
NA
NA
0
1
Channel 1
2
Clock
0
1
Channel 2
2
Clock
Hardware
55

Advertisement

Table of Contents
loading

Table of Contents