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Chapter 3
Pin #
Signal
21
SD0
22
SD1
23
SD2
24
NU
25
NU
26
NU
27
SD11
28
SD12
29
SD13
30
SD14
31
SD15
32
SDCS3*
33
NU
34
SIOR*
35
SIOW*
36
NU
37
IRQ15
38
VCC
39
Mas/Slv*
40
NU
41
CFRST*
42
SIORDY
43
NC
44
NU
45
NU
46
SPDIAG
38
Description
Secondary Disk Data 0 – Refer to SD3 on pin-2 for more information.
Secondary Disk Data 1 – Refer to SD3 on pin-2 for more information.
Secondary Disk Data 2 – Refer to SD3 on pin-2 for more information.
Not used (IOIS16*, connected through 10k ohm resistor to VCC)
Not used (CD2*, connected through 10k ohm resistor to VCC)
Not used (CD1*, connected through 10k ohm resistor to VCC)
Secondary Disk Data 11 – Refer to SD3 on pin-2 for more information.
Secondary Disk Data 12 – Refer to SD3 on pin-2 for more information.
Secondary Disk Data 13 – Refer to SD3 on pin-2 for more information.
Secondary Disk Data 14 – Refer to SD3 on pin-2 for more information.
Secondary Disk Data 15 – Refer to SD3 on pin-2 for more information.
Secondary Slave/Master Chip Select – This signal, along with CE1*, selects the
CompactFlash card and indicates to the card when a byte or word operation is
being performed. This signal always accesses the odd byte of the word.
Not used (VS1*, connected through 10k ohm resistor to VCC)
Secondary I/O Read/Write Strobe – This signal is generated by the host and
gates the I/O data onto the bus from the CompactFlash card when the card is
configured to use the I/O interface.
Secondary I/O Read/Write Strobe – This signal is generated by the host and
clocks the I/O data on the Card Data bus into the CompactFlash card controller
registers when the card is configured to use the I/O interface. The clock occurs
on the negative to positive edge of the signal (trailing edge).
Not used (WE*, connected through 10k ohm resistor to VCC)
Interrupt Request 15 – IRQ 15 is asserted by drive (CF) when it has a pending
interrupt (PIO transfer of data to or from the drive to the host).
Voltage Jumper (JP3) – Selects voltage; pins 1-2 = +5V or pins 2-3 = +3.3V.
Master/Slave – This pin determines the Master or Slave configuration of the
CompactFlash by jumper (JP2) setting. When this pin is grounded (jumper
inserted pins 2-3), CF is configured as Master. When this pin is open (jumper
inserted pins 1-2), CF is configured as Slave (Default).
Not used (VS2*, connected through 10k ohm resistor to VCC)
CF Reset – This input signal is the active low hardware reset from the host. If
this pin goes high, it is used as the reset signal. This pin is driven high at
power-up, causing a reset, and if left high will cause another reset.
Secondary I/O DMA Channel Ready – When negated, extends the host transfer
cycle of any host register access when the CF is not ready to respond to a data
transfer request. High impedance if asserted.
Not Connected (InpAck)
Not used (REG*, connected through 10k ohm resistor to VCC)
Not used (ACT/SLV, connected through 10k ohm resistor to VCC)
Secondary Pass Diagnostic – This input / output signal is used in the
Master/Slave handshake protocol.
Reference Manual
Hardware
LittleBoard 800
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