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Ampro LittleBoard 550 Reference Manual

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LittleBoard
550
Single Board Computer
Reference Manual
P/N 5001740A Revision A

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  • Page 1 ™ LittleBoard Single Board Computer Reference Manual P/N 5001740A Revision A...
  • Page 2 Notice Page NOTICE No part of this document may be reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any language or computer language, in any form or by any means, electronic, mechanical, magnetic, optical, chemical, manual, or otherwise, without the prior written permission of Ampro Computers, Incorporated.

  • Page 3: Table Of Contents

    Contents Chapter 1 About This Manual ......................1 Purpose of this Manual........................1 Reference Material ..........................1 Related Ampro Products ........................2 Chapter 2 Product Overview......................5 EBX Architecture ..........................5 Product Description ..........................6 Board Features..........................7 Block Diagram ..........................10 Major Integrated Circuits (ICs) .....................11 Connector Definitions ........................12 Additional Components ........................12 Jumper Definitions........................14 LED Definitions..........................14...
  • Page 4 Contents USB Signals (USB0 and USB1) ....................49 Utility 3 Interface (J18) ........................51 USB Signals (USB2 and USB3) ....................51 Ethernet Interfaces (J7, J32)......................52 Audio Interface (J28)........................53 Video Interfaces (J3, J4, J5, J31) ....................55 CRT Interface..........................55 LCD Interface 1..........................
  • Page 5 Contents Figure 2-4. Connector and Fuse Locations (Top view) ..............13 Figure 2-5. Jumpers Locations (Top view) ..................15 Figure 2-6. Component and Fuses Locations (Bottom view) ............16 Figure 2-7. LittleBoard 550 Dimensions (Top view, #1) ..............17 Figure 2-8. LittleBoard 550 Dimensions (Top view, #2) ..............18 Figure 3-1.
  • Page 6 Contents Table 3-28. CPU Fan (J2) ....................... 61 Table 4-1. BIOS Setup Menus ......................64 Table 4-2. Floppy Drive BIOS Settings ................... 67 Table 4-3. LCD Panel Type List...................... 75 Table A-1. USA Technical Support Contact Information ..............81 Table B-1. Connector and Manufacturers' Part Numbers............... 83 Reference Manual LittleBoard 550...

  • Page 7: Chapter 1 About This Manual

    Chapter 1 About This Manual Purpose of this Manual This manual is for designers of systems based on the LittleBoard™ 550 single board computer (SBC). This manual contains information that permits designers to create an embedded system based on specific design requirements.

  • Page 8: Related Ampro Products

    Chapter 1 About this Manual Chip (integrated circuits) specifications used on the LittleBoard 550: • VIA Technologies, Inc. the Eden™ ESP processors, and the chips, VT8606 and VT82C686B, used for the Northbridge/Video controller and Southbridge respectively Web site: http://www.viatech.com • Winbond Electronics, Corp. and the W83877TF chip used for the secondary I/O controller Web site: http://www.winbond-usa.com/products/winbond_products/pdfs/PCIC/877tf.pdf •...
  • Page 9 Chapter 1 About this Manual • LittleBoard 800 – This EBX single board computer (SBC) is a highly integrated, high- performance, rugged, high quality system based on Intel's 1.4GHz Low Voltage Pentium M 738, 1.0GHz Low Voltage Celeron M, or 600MHz Ultra Low Voltage Celeron M CPUs. In addition to the standard LittleBoard features (EBX form factor, PC/104 &...
  • Page 10 Chapter 1 About this Manual • EnCore™ Family – These high-performance, compact, rugged Computer-on-Module (COM) solutions use various processor technologies including x86, MIPS®, and PowerPC™ architectures to plug into your custom baseboard. Each EnCore module provides standard peripherals, including Ultra/DMA 33/66/100 IDE, floppy drive interface, PCI bus, serial, parallel, PS/2 keyboard and mouse interfaces, 10/100BaseT Ethernet, and USB ports.

  • Page 11: Chapter 2 Product Overview

    Chapter 2 Product Overview This introduction presents general information about the EBX Architecture and the LittleBoard 550 single board computer (SBC). After reading this chapter you should understand: • EBX Architecture • LittleBoard 550 architecture • LittleBoard 550 features • Major components •...

  • Page 12: Product Description

    Chapter 2 Product Overview 4-40 screws (4) PC/104 Module 0.6 inch spacers (4) PC/104 Plus Module Stackthrough Expansion PCI Stack through Bus Headers Headers LittleBoard 550 0.6 inch spacers (4) 4-40 nuts (4) Figure 2-1. Stacking PC/104 Modules with the LittleBoard 550 Product Description The LittleBoard 550 is an exceptionally high integration, high performance, rugged, and high quality single-board system, which contains all the component subsystems of a PC/AT PCI motherboard plus...

  • Page 13: Board Features

    Chapter 2 Product Overview Board Features • CPU features Via Eden™ ESP 10000 (1GHz), Eden ESP 5000 (533MHz) or Eden ESP 3000 (300MHz) ♦ Each CPU has a Front Side Bus (FSB) of 133MHz, 133MHz, or 66MHz, respectively ♦ • Memory Provides a single standard 168-pin DIMM slot ♦...
  • Page 14 Chapter 2 Product Overview Supports RS232, RS485, or RS422 operation on each port ♦ Supports programmable word length, stop bits, and parity ♦ Supports 16-bit programmable baud-rate generator and a interrupt generator. ♦ • Parallel Port Supports standard printer port ♦...
  • Page 15 Chapter 2 Product Overview • Video Interfaces (CRT/LVDS) Supports CRT (1600 x 1200) with 32MB SMA (Shared Memory Area) ♦ AGP 4X graphics ♦ Compliant with Rev 2.0 of AGP Interface ♦ 36-bit flat panel outputs (DSTN, TFT) ♦ LVDS outputs (1 or 2 channel, four differential signals 3-bits + clock) ♦...

  • Page 16: Block Diagram

    Chapter 2 Product Overview Block Diagram Figure 2-3 shows the functional components of the board. VIA EDEN ™ Clock CRT VGA SDRAM Northbridge Temp TFT LCD SODIMM Memory Bus VT8606 LVDS LCD SMBus PCI Bus PC104-Plus IDE Primary Bus Connector IDE Secondary Southbridge IDE Devices,...

  • Page 17: Major Integrated Circuits (Ics)

    Chapter 2 Product Overview Major Integrated Circuits (ICs) Table 2-1 lists the major integrated circuits, including a brief description of each, on the LittleBoard 550 and Figure 2-4 shows the location of the major chips. Table 2-1. Major Integrated Circuit Description and Function Chip Type Mfg.

  • Page 18: Connector Definitions

    Chapter 2 Product Overview Connector Definitions Table 2-2 describes the connectors shown in Figures 2-3 to 2-5. All I/O connectors use 0.1” pin spacing unless otherwise indicated. Table 2-2. Connector Descriptions Jack # Signal Description J1A/J1B & PC/104 bus 104-pins for PC/104 connector J1C, J1D Fan connector 3-pin header provides +5v and ground to fan.
  • Page 19 Chapter 2 Product Overview LCD 2 (J4) CRT (J5) CRT Fuse (F5) LCD 1 (J3) Fan ( DIMM1 CPU (U1) LVDS (J31) Utility 3 (J18) Audio In/ Out (J28) PC/104-Plus (J21) CompactFlash Socket (J23) Ethernet Port 2 (J32) Parallel (J15) Ethernet Floppy (J14) Port 1 (J7)

  • Page 20: Jumper Definitions

    Chapter 2 Product Overview Jumper Definitions Table 2-4 describes the jumpers shown in Figure 2-5. Table 2-4. Jumper Settings Jumper # Installed Removed/Installed JP3 – CompactFlash Enable +5V (1-2) Enable +3.3V (1-3) Voltage Select (Default) JP4 – CompactFlash Enable Master (pins 1-2) Enable Slave (Removed) Master/Slave Select (Default)
  • Page 21 Chapter 2 Product Overview CPU (U1) COM1 RS485 Term (JP5) COM2 RS485 Term (JP6) COM3 CF Master/ RS485 Slave (JP4) Term (JP7) CF Voltage COM4 Select (JP3) RS485 Term (JP8) Figure 2-5. Jumpers Locations (Top view) LittleBoard 550 Reference Manual...

  • Page 22: Specifications

    Chapter 2 Product Overview Q13 Q14 USB1 Fuse (F2) USB0 Fuse (F1) USB3 Fuse (F4) USB2 Fuse (F3) Super I/O Controller (U13) Figure 2-6. Component and Fuses Locations (Bottom view) Specifications Physical Specifications Table 2-7 gives the physical dimensions of the board and Figures 2-7 and 2-8 give the mounting dimensions and pin-1 connector locations.

  • Page 23: Mechanical Specifications

    Chapter 2 Product Overview Mechanical Specifications Figures 2-7 and 2-8 show top views of the LittleBoard 550 with the mechanical mounting dimensions. 7.800 7.600 7.600 7.500 7.450 7.150 7.115 7.050 5.800 5.700 3.915 3.500 3.100 2.700 2.800 2.650 2.458 2.200 0.245 -0.075 -0.200...
  • Page 24 Chapter 2 Product Overview 7.800 7.600 7.600 7.050 6.800 6.385 6.350 6.345 0.719 -0.200 Figure 2-8. LittleBoard 550 Dimensions (Top view, #2) All dimensions are given in inches. NOTE Reference Manual LittleBoard 550...

  • Page 25: Power Specifications

    Chapter 2 Product Overview Power Specifications Table 2-8 shows the power requirements for the LittleBoard, including the I/O interface board. Table 2-8. Power Supply Requirements Parameter 300MHz Characteristics 533MHz Characteristics 1GHz Characteristics Input Type Regulated DC voltages Regulated DC voltages Regulated DC voltages In-rush* Current 26.9Amps (134.5W)
  • Page 26 Chapter 2 Product Overview Reference Manual LittleBoard 550...

  • Page 27: Chapter 3 Hardware

    Chapter 3 Hardware Overview This chapter discusses the chips and features of the connectors in the following order: • CPU (U1) • Memory • PC/104-Plus (J21A, B, C, D) • PC/104 (J1A, B, C, D) • IDE Interfaces (J12, J17) •...

  • Page 28: Cpu (U1)

    Chapter 3 Hardware CPU (U1) The LittleBoard 550 offers three VIA Technologies Eden processor choices; high performance 1GHz ESP 10000 processor, 533MHz ESP 5000 processor, or the low cost, 300MHz ESP3000 processor. ESP Processors The ESP (0.13µ or 0.15µ) processors at 1GHz, 533MHz, or 300MHz use 133MHz, 133MHz, or 66MHz FSB (front side bus) respectively, with 128kB Level 1 cache and 64kB Level 2 cache.

  • Page 29: Interrupt Channel Assignments

    Chapter 3 Hardware Interrupt Channel Assignments The channel interrupt assignments are shown in Table 3-1. Table 3-1. Interrupt Channel Assignments Device vs IRQ No. 10 11 Timer Keyboard Secondary Cascade COM1 COM2 COM3 COM4 Floppy Parallel IDE Primary IDE Secondary Math Coprocessor PS/2 Mouse Automatically Assigned...

  • Page 30: I/O Address Map

    Chapter 3 Hardware Table 3-2. Memory Map Base Address Function 00000000h 0009FFFFh Conventional Memory 000A0000h 000AFFFFh Graphics Memory 000B0000h 000B7FFFh Mono Text Memory 000B8000h 000BFFFFh Color Text Memory 000C0000h 000C7FFFh Standard Video BIOS 000F0000h 000FFFFFh System BIOS Area (Storage and RAM Shadowing) 00100000h 04000000h Extended Memory (If onboard VGA is enabled, then the amount...

  • Page 31: Pc/104-Plus Interface (J21)

    Chapter 3 Hardware PC/104-Plus Interface (J21) The PC/104-Plus uses a 120-pin (30x4) header interface. This interface header carries all of the appropriate PCI signals operating at clock speeds up to 33MHz. The Northbridge, VT8606, integrates a PCI arbiter that supports up to four devices with three external PCI masters. This interface header accepts stackable modules and is located on the top of the board.
  • Page 32 Chapter 3 Hardware Pin # Signal Input/ Description Output 18 (A18) IDSEL0 Initialization Device Select 0 – This signal line is one of four signal lines. These signals are used as the chip-select signals during configuration 19 (A19) AD24 PCI Address and Data Bus Line 24 – Refer to Pin 3 for more information.
  • Page 33 Chapter 3 Hardware Pin # Signal Input/ Description Output 45 (B15) +3.3V +3.3 volts ±5% power supply 46 (B16) AD20 PCI Address and Data Bus Lines 20 – Refer to Pin 3 for more information. 47 (B17) AD23 PCI Address and Data Bus Line 23 – Refer to Pin 3 for more information.
  • Page 34 Chapter 3 Hardware Pin # Signal Input/ Description Output 74 (C14) +3.3V +3.3 volts ±5% power supply 75 (C15) AD17 PCI Address and Data Bus Line 17 – Refer to Pin 3 for more information. 76 (C16) Ground 77 (C17) AD22 PCI Address and Data Bus Line 22 –...
  • Page 35 Chapter 3 Hardware Pin # Signal Input/ Description Output 103 (D13) +3.3V +3.3 volts ±5% power supply 104 (D14) C/BE2* PCI Bus Command/Byte Enable 2 – Refer to Pin 4 for more information. 105 (D15) GND Ground 106 (D16) AD19 PCI Address and Data Bus Line 19 –...

  • Page 36: Pc/104 Interface (J1A,B,C,D)

    Chapter 3 Hardware PC/104 Interface (J1A,B,C,D) The PC/104 Bus uses a 104-pin 100 mil header interface. This interface header will carry all of the appropriate PC/104 signals operating at clock speeds up to 8MHz. This interface header accepts stackable modules and is located on the top of the board. To conform to the PC/104 standard, keys have been inserted into NOTE specific pins in the PC/104 connector (B10, C19).

  • Page 37: Table 3-6. Pc/104 Interface Pin/Signal Descriptions (J1B)

    Chapter 3 Hardware Pin # Signal Description (J1 Row A) 23 (A23) System Address 8 – Refer to SA19, pin-A12, for more information. 24 (A24) System Address 7 – Refer to SA19, pin-A12, for more information. 25 (A25) System Address 6 – Refer to SA19, pin-A12, for more information. 26 (A26) System Address 5 –...
  • Page 38 Chapter 3 Hardware Pin # Signal Descriptions (J1 Row B) 47 (B15) DACK3* DMA Acknowledge 3 – Used by DMA controller to select the I/O resource requesting the bus, or to request ownership of the bus as a bus master device. Can also be used by the ISA bus master to gain control of the bus from the DMA controller.

  • Page 39: Table 3-7. Pc/104 Interface Pin/Signal Descriptions (J1C)

    Chapter 3 Hardware Table 3-7. PC/104 Interface Pin/Signal Descriptions (J1C) Pin # Signal Descriptions (J1 Row C) 1 (C0) Ground 2 (C1) SBHE* System Byte High Enable – This signal is driven low to indicate a transfer of data on the high half of the data bus (D15 to D8). 3 (C2) LA23 Lactchable Address 23 –...
  • Page 40 Chapter 3 Hardware Pin # Signal Descriptions (J1 Row D) 27 (D6) IRQ15 Interrupt Request 15 – Asserted by a device when it has pending interrupt request. Only one device may use the request line at a time. 28 (D7) IRQ14 Interrupt Request 14 –...

  • Page 41: Ide Interface (J12, J17)

    Chapter 3 Hardware IDE Interface (J12, J17) The LittleBoard 550 provides two IDE connectors for primary and secondary IDE signals. The EIDE interface logic supports the following features: • Transfer rate up to 100Mbps • Increase reliability using Ultra DMA 33/66/100 transfer protocols •...

  • Page 42: Table 3-10. Secondary Ide Interface Pin/Signal Descriptions (J17)

    Chapter 3 Hardware Pin # Signal Description PDREQ Primary DMA Request – Used for DMA transfers between host and drive (direction of transfer controlled by PDIOR* and PDIOW*). Also used in an asynchronous mode with PDACK*. Drive asserts PDREQ when ready to transfer or receive data.
  • Page 43 Chapter 3 Hardware Pin # Signal Description All Task File operations occur in byte mode on the low order bus D0-D7, while all data transfers are 16 bit using D0-D15 to provide the disk data signals. SDD8 Secondary Disk Data 8 – Refer to SDD7 on pin-2 for more information. SDD6 Secondary Disk Data 6 –...
  • Page 44 Chapter 3 Hardware Pin # Signal Description SDA1 Secondary Disk Address 1 – One of three signals (0 – 2) used to indicate which byte in the ATA command block or control block is being accessed. SD33_66 UDMA 33/66 Sense – Used to detect the presence of an 80 conductor IDE cable on the secondary IDE channel.

  • Page 45: Compactflash Adapter (J23)

    Chapter 3 Hardware CompactFlash Adapter (J23) The board contains a Type II PC card socket, which allows for the insertion of a CompactFlash Card. The CompactFlash (CF) Card acts as a standard IDE Drive and is connected to the primary IDE bus. If a CompactFlash card is installed, only one additional IDE drive may be added to the primary bus.
  • Page 46 Chapter 3 Hardware Pin # Signal Description PDD15 Disk Data 15 – Refer to PDD3 on pin-2 for more information. PDCE2* Primary Slave/Master Chip Select – This signal, along with CE1*, selects the CompactFlash card and indicates to the card when a byte or word operation is being performed.

  • Page 47: Floppy Drive Interface (J14)

    Chapter 3 Hardware Floppy Drive Interface (J14) The VT82C686B chip provides the floppy controller and supports two floppy drives. The floppy signals are provided through the standard 34-pin connector (J14). The floppy controller will support the 360k, 720k, 1.2M, 1.44M, and 2.88M drives. USB floppy disk drives are also supported.

  • Page 48: Parallel Port Interface (J15)

    Chapter 3 Hardware Parallel Port Interface (J15) Parallel port supports standard parallel, Bi-directional, ECP and EPP protocols. The VIA Southbridge provides the parallel port interface signals. Table 3-13. Parallel Interface Pin/Signal Descriptions (J15) Pin # Signal In/Out Description Strobe* Strobe* – This is an output signal used to strobe data into the printer. I/O pin in ECP/EPP mode.

  • Page 49: Serial Interfaces (J11, J13)

    Chapter 3 Hardware Serial Interfaces (J11, J13) Two chips provide the circuitry for the 4 serial ports. The VT86C686B provides serial ports 1 and 2 through connector J11 and the Super I/O provides serial ports 3 and 4 through connector J13. The four serial ports support the following features: •...

  • Page 50: Table 3-14. Serial A Interface Pin/Signal Descriptions (J11)

    Chapter 3 Hardware Table 3-14. Serial A Interface Pin/Signal Descriptions (J11) Pin # Pin # Signal Description DCD1* Data Carrier Detect 1 – Indicates external serial communications device is detecting a carrier signal (i.e., a communication channel is currently (COM1) open).

  • Page 51: Table 3-15. Serial B Interface Pin/Signal Descriptions (J13)

    Chapter 3 Hardware Pin # Pin # Signal Description CTS2* Clear To Send 2 – Indicates external serial communications device is ready to receive data. Used as hardware handshake with RTS2 for low level flow control. RX2+ RX2+ – If in RS485 or RS422 mode, this pin is Receive Data 2 -. DTR2* Data Terminal Ready 2 –...
  • Page 52 Chapter 3 Hardware Pin # Pin # Signal Description DCD4* Data Carrier Detect 4 – Indicates external serial communications device is detecting a carrier signal (i.e., a communication channel is currently (COM4) open). In direct connect environments, this input will be driven by DTR4 as part of the DTR/DSR handshake.

  • Page 53: Utility Interfaces

    Chapter 3 Hardware Utility Interfaces The Utility interfaces consists of three connectors that provide the standard interface signals, which include the: • Utility 1 Keyboard ♦ External battery connection ♦ Reset Switch ♦ PC Speaker ♦ • Utility 2 PS/2 Mouse ♦...

  • Page 54: Utility 2 Interface (J24)

    Chapter 3 Hardware Table 3-16. Utility 1 Interface Pin/Signal Descriptions (J16) Pin # Signal Description -12 volts external supplied through I/O Interface board Ground -5 volts external supplied through I/O Interface board Ground Not used (Power On LED) Not connected (PWR Good) SPKR+ Speaker + Output Ground...

  • Page 55: Usb Signals (Usb0 And Usb1)

    Chapter 3 Hardware Table 3-17. SMBus Reserved Addresses Component Address Binary Serial EEPROM (SEEP) 1010,010x SDRAM EPROM 1010,000x Clock Generator (ICS9250) 1101,001x Southbridge (VT82C686B) 0000,000x (default) Programmable Master Thermal Sensor (MAX1617) 0011,0010x USB Signals (USB0 and USB1) The LittleBoard 550 contains one root USB hub with four functional USB ports. This connector (Utility 2) provides two of the four USB ports (USB0 and USB1).

  • Page 56: Table 3-18. Utility 2 Interface Pin/Signal Descriptions (J24)

    Chapter 3 Hardware Table 3-18. Utility 2 Interface Pin/Signal Descriptions (J24) Pin # Signal Description SUSC* Lid Switch PWRBT* Power Button BATLOW* Low Battery Not Connected (IR Mode Select) Reserved Reserved (IrDA Transmit) Reserved Reserved (IrDA Receive) Ground +5 volts MDATA Mouse Data MCLK...

  • Page 57: Utility 3 Interface (J18)

    Chapter 3 Hardware Utility 3 Interface (J18) The Utility 3 interface is a 10-pin connector used to provide the two of the USB port signals to an external board with USB connections or directly to the respective USB connector for the USB ports. Table 3-19 gives the pin outs and interface signals for Utility 3 interface.

  • Page 58: Ethernet Interfaces (J7, J32)

    Chapter 3 Hardware Ethernet Interfaces (J7, J32) The Ethernet solution is provided by two Intel 82551ER PCI controller chips, which consists of both the Media Access Controller (MAC) and the physical layer (PHY) combined into a single component solution. The 82551ER is a 32-bit PCI controller that features enhanced scatter-gather bus mastering capabilities, which enables the 82551ER to perform high-speed data transfers over the PCI bus.

  • Page 59: Audio Interface (J28)

    Chapter 3 Hardware Table 3-21. Ethernet Port 2 Pin/Signal Descriptions (J32) Pin # Signal Description Analog Twisted Pair Ethernet Transmit Differential Pair. These pins transmit the serial bit stream for transmission on the Unshielded Twisted Pair Cable (UTP). These signals interface directly with an isolation transformer. Analog Twisted Pair Ethernet Receive Differential Pair.

  • Page 60: Table 3-22. Audio Interface Pin/Signal Descriptions (J28)

    Chapter 3 Hardware Table 3-22. Audio Interface Pin/Signal Descriptions (J28) Pin # Signal Description VIDEO_L Video audio signal in left channel VIDEO_GND Video digital ground (Audio ground) VIDEO_R Video audio signal in right channel CD_L CD-ROM signal left channel CD_GND CD-ROM digital ground (to Audio CODEC) CD_R CD-ROM signal right channel...

  • Page 61: Video Interfaces (J3, J4, J5, J31)

    Chapter 3 Hardware Video Interfaces (J3, J4, J5, J31) The Northbridge (VT8606) chip provides the graphics control and video signals to the traditional glass CRT monitors and the LCD and LVDS flat panel displays. The chip features are listed below: CRT features: •...

  • Page 62: Lcd Interface 1

    Chapter 3 Hardware LCD Interface 1 Table 3-24. LCD Interface 1 Pin/Signal Descriptions (J3) Pin # Signal Description Ground +3.3V +3.3V +12V +12V Ground FPCLK Flat panel shift clock Ground FPDE Flat panel display enable Ground Line Pulse – This signal is the digital monitor equivalent of HSYNC First Line Marker –...

  • Page 63: Lcd Interface 2

    Chapter 3 Hardware Pin # Signal Description ENAVDD Power sequencing output for LCD driver Ground FP20 Flat Panel Data Output 20 – Refer to pin 12 for more information. FP21 Flat Panel Data Output 21 – Refer to pin 12 for more information. FP22 Flat Panel Data Output 22 –...

  • Page 64: Lvds Interface

    Chapter 3 Hardware LVDS Interface Table 3-26. LVDS Interface Pin/Signal Descriptions (J31) Pin # Signal Description Line Channel 3.3V_Panel +3.3V source 5V_Panel +5V source Ground Ground LVDS_Y0M Data Negative Output LVDS_Y0P Data Positive Output LVDS_Y1M Data Negative Output Channel 1 LVDS_Y1P Data Positive Output LVDS_Y2M...

  • Page 65: Miscellaneous

    Chapter 3 Hardware Miscellaneous Real Time Clock (RTC) The LittleBoard 550 contains a Real Time Clock (RTC) and along with the CMOS RAM are backed up with a Lithium Battery. If the battery is not present or has failed the BIOS has a battery-free boot option to complete the boot process.

  • Page 66: Watchdog Timer

    Chapter 3 Hardware for the serial port 1. As an alternate, you can short the equivalent pins (pins 7 and 9) on the respective DB9 port connector as shown in Figure 3-3. Serial A Interface (J11) Standard DB9 Serial for Serial Port 1 Port Connector (Female) (or COM1 Port) Rear View...

  • Page 67: Power Interface (J10)

    Chapter 3 Hardware Power Interface (J10) The LittleBoard 550 uses five separate voltages on the board, but only one of the voltages is provided externally (+5 volts) through the external connector, which uses a 7-pin vertical header with 0.156” (3.96mm) spacing. Holes for a right angle mounting header are also available at J10. All the onboard voltages are derived from the externally supplied +5 volts DC +/- 5%.
  • Page 68 Chapter 3 Hardware Reference Manual LittleBoard 550...

  • Page 69: Chapter 4 Bios Setup

    Chapter 4 BIOS Setup Introduction This chapter describes the BIOS Setup menus and the various screens used for configuring the LittleBoard 550. Some features in the Operating System or application software may require configuration in the BIOS Setup screens. This section assumes the user is familiar with general BIOS Setup and does not attempt to describe the BIOS functions.

  • Page 70: Accessing Bios Setup (Serial Console)

    Chapter 4 BIOS Setup Accessing BIOS Setup (Serial Console) Entering the BIOS Setup, in serial console mode, is very similar to the steps you use to enter BIOS Setup with a VGA display, except the actual keys you use. 1. Set the serial terminal, or the PC with communications software to the following settings: 115k baud ♦...

  • Page 71: Bios Menus

    Chapter 4 BIOS Setup BIOS Menus BIOS Setup Opening Screen Ampro Setup Utility for LittleBoard 550, SWxxxxxx Help for BIOS and Hardware Settings > BIOS and Hardware Settings < Reload Initial Settings Load Factory Default Settings Exit, Saving Changes Exit, Discarding Changes Use Arrow keys to change menu item, use Enter to select menu item (C) Copyright 2005, Ampro Computers, Inc.

  • Page 72: Bios Configuration Screen

    Chapter 4 BIOS Setup BIOS Configuration Screen Ampro Setup Utility for LittleBoard 550, SWxxxxxx [Date & Time] Help for Date > Date Jan 2005< Time 10:24:34 [Drive Assignment] The Date & Time fields are updated Drive A 1.44 MB, 3.5” in real-time.

  • Page 73: Table 4-2. Floppy Drive Bios Settings

    Chapter 4 BIOS Setup Drive D – [none], [HDD/CF on Pri Master], [CDROM on Pri Master], [HDD/CF on Pri Slave], ♦ [CDROM on Pri Slave], [HDD on Sec Master], [CDROM on Sec Master], [HDD on Sec Slave], [CDROM on Sec Slave], [USB HDD], or [USB CDROM] Table 4-2.
  • Page 74 Chapter 4 BIOS Setup • Boot Order Boot 1 – [none], [Drive A], [Drive B], [Drive C], [Drive D], [CDROM], [Alarm], or [Reboot] ♦ Boot 2 – [none], [Drive A], [Drive B], [Drive C], [Drive D], [CDROM], [Alarm], or [Reboot] ♦...

  • Page 75: User Interface Options

    Chapter 4 BIOS Setup This feature allows you to use any one of the three common formats NOTE available for CompactFlash cards without having to re-format the CompactFlash card before you can use it on the LittleBoard 550. The LBA (Logical Block Address) is set as the default format because it can handle larger drives and is the newest format available, but may not be the one used to format your CompactFlash card.

  • Page 76: Memory Control Options

    Chapter 4 BIOS Setup Memory Control Options • Memory Memory Test – [Fast], [Standard], or [Exhaustive] ♦ If this field is set to [Fast], only basic memory tests are performed during POST to shorten • POST time. If this field is set to [Standard], more than basic tests are performed, but POST time is •...

  • Page 77: Power Management And Advanced User Options

    Chapter 4 BIOS Setup To prevent system hangs or failure at extended temperatures, do not CAUTION change the DRAM Refresh Rate, Fast Precharge, and Bank Interleave values, unless you fully understand the intended results. Changing any of these settings may cause the processor to run slower or fail at extended temperatures for this board.
  • Page 78 Chapter 4 BIOS Setup However, connecting a Hot Cable to the other port (port not selected) overrides this field setting and activates the connected port. Connecting a Hot Cable to one of the serial ports only allows console redirection when a Hot Cable is actually connected to Serial 1 or 2. Use the modified serial cable described in Chapter 3, under Hot (Serial) Cable.
  • Page 79 Chapter 4 BIOS Setup IRQ – [none], [1], [3], [4], [5], [6], [7], [9], [10], [11], [12], [14], or [15] • This field specifies the IRQ used for Serial Port 1. If this field is set to [none], then no IRQ is assigned, making it available for other devices.

  • Page 80: Video, Flat Panel, And Audio Options

    Chapter 4 BIOS Setup DMA – [3], [2], [1], or [0] • This field specifies the DMA channel used for the parallel port (LPT 1). If the LPT 1 field is set to [Disabled], then no DMA channel is assigned, making it available for other devices.

  • Page 81: Pci, Plug N' Play, And Interrupt Assignments

    Chapter 4 BIOS Setup If the [CRT+LCD] is selected, the same video information is shown on both displays • simultaneously. Panel Type – [640 x 480 x 18 TFT] ♦ Refer to Table 4-3 for the list of supported resolutions and flat panel types and the Software Release Notes for the signal pin assignments.
  • Page 82 Chapter 4 BIOS Setup If this field is set to [Disabled], the IRQs and DMA channels listed below can not be • assigned to Plug and Play devices. PnP OS – [Disabled] or [Enabled] ♦ If this field is set to [Enabled], the BIOS makes the Plug and Play API available for Plug and Play Operating Systems.
  • Page 83 Chapter 4 BIOS Setup Assign IRQ 10 – [Disabled] or [Enabled] (Typically unused) ♦ If this field is set to [Enabled], then the BIOS can assign this IRQ to a Plug and Play • adapter. If another device in the system is using this IRQ, then this field should be set to •...
  • Page 84 Chapter 4 BIOS Setup Assign DMA 3 – [Disabled] or [Enabled] ♦ If this field is set to [Enabled], then the BIOS can assign this DMA channel to a Plug and • Play adapter. If another device in the system is using this DMA channel, then this field should be set to •...

  • Page 85: Splash Screen Customization

    Chapter 4 BIOS Setup Splash Screen Customization The LittleBoard 550 BIOS supports a graphical splash screen, which can be customized by the user and displayed on screen when enabled through the BIOS Setup Utility. The graphical image can be a company logo or any custom image the user wants to display during the boot process.
  • Page 86 Chapter 4 BIOS Setup Use the following steps to convert and load your custom image onto the LittleBoard 550. 1. Copy the files from the LB550\software\examples\splash directory on the CD-ROM to a new directory (conversion directory) on your PC. This new conversion directory is where you intend to do the conversion and save the file. 2.

  • Page 87: Appendix A Technical Support

    Appendix A Technical Support Ampro Computers, Inc. provides a number of methods for contacting Technical Support listed in the Table A-1 below. Requests for support through the Virtual Technician are given the highest priority, and usually will be addressed within one working day. •...
  • Page 88 Appendix A Technical Support Reference Manual LittleBoard 550...

  • Page 89: Appendix B Connector Part Numbers

    Appendix B Connector Part Numbers The following table provides the connector part numbers, or the equivalent, and if applicable the ribbon- cable part number, used as the mating connector to the referenced connectors on the LittleBoard 550. All connectors use 0.100” (2.54mm) pin spacing unless otherwise indicated. Table B-1.
  • Page 90 Appendix B Connector Part Numbers Reference Manual LittleBoard 550...

  • Page 91: Appendix Clan Boot Option

    Appendix C LAN Boot Option The LAN Boot feature is optional for the LittleBoard 550 and you must contact Ampro or your sales representative for more information before you can make use of this option. The LAN Boot option requires a BIOS update to make use of the LAN Boot features. Introduction LAN Boot is supported by both Ethernet ports on the LittleBoard 550, and is based on the Preboot Execution Environment (PXE), an open industry standard.

  • Page 92: Pxe Boot Agent Bios Setup

    Appendix C LAN Boot Options PXE Boot Agent BIOS Setup This section describes the BIOS settings of the third party PXE Boot agent provided by Ampro and integrated into the LittleBoard 550 firmware upgrade. The PXE Boot Agent’s BIOS setup menu and screens are used when configuring the LAN boot feature in the LittleBoard 550 BIOS.

  • Page 93: Pxe Boot Agent Setup Screen

    Appendix C LAN Boot Options PXE Boot Agent Setup Screen Argon Managed PC Boot Agent (MBA) v4.31 (BIOS integrated) (C) Copyright 2002, Argon Technology Corporation (C) Copyright 2003, 3COM Corporation All rights reserved Configuration Boot Method: Default Boot: Local Local Boot: Enabled Config Message Enabled...
  • Page 94 Appendix C LAN Boot Options • NetWare Configuration Boot Method: – [PXE], [TCP/IP], [NetWare], or [RPL] ♦ Protocol: – [802.2], [802.3], or [EthII] ♦ Default Boot: – [Local] or [Network] ♦ Local Boot: – [Disabled] or [Enabled] ♦ Config Message: – [Disabled] or [Enabled] ♦...

  • Page 95: Index

    Index Ampro Products CD-ROM LittleBoard 550 Doc & SW ....... 2 CoreModule™ Family ........3 CompactFlash EnCore™ Family ..........4 always use [HDD/CF Pri Master/Slave]..66 ETX Family ............3 ATA format selection ........68 LittleBoard™ 700 ..........2 connectors LittleBoard™ 800 ..........3 connector list ........... 12 MightyBoard™...
  • Page 96 Index Lithium Battery Pin-1 locations ............. 13 RTC..............59 POST LittleBoard 550 no BIOS Setup prompt ........63 audio interface features ........53 no bootable device available......68 block diagram...........10 Preboot Execution Environment (PXE)....85 boot devices .............66 pre-OS agent............85 CompactFlash socket ........39 processor requirements connector list............12 heatsink requirements ........
  • Page 97 Index splash screen PS/2 mouse interface ........8, 48 converting image..........79 Real-time clock..........9 customer defined..........79 serial console ..........9, 59 customization ...........79 Serial EEPROM (SEEP)......7, 22 image conversion tools ........80 serial ports (4)..........7, 43 requirements.............79 SMBus devices ..........48 supported features splash screen............
  • Page 98 Index Reference Manual LittleBoard 550...

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