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Ampro ReadyBoard 700 Reference Manual

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ReadyBoard 700
Single Board Computer
Reference Manual
P/N 5001722A Revision C

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Summary of Contents for Ampro ReadyBoard 700

  • Page 1 ReadyBoard 700 Single Board Computer Reference Manual P/N 5001722A Revision C...
  • Page 2 Notice Page NOTICE No part of this document may be reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any language or computer language, in any form or by any means, electronic, mechanical, magnetic, optical, chemical, manual, or otherwise, without the prior written permission of Ampro Computers, Incorporated.

  • Page 3: Table Of Contents

    Contents Chapter 1 About This Manual ......................1 Purpose of this Manual ........................1 Reference Material ..........................1 Related Ampro Products ........................2 Chapter 2 Product Overview......................5 EPIC Architecture ..........................5 Product Description ..........................6 Board Features..........................6 Block Diagram ..........................9 Major Integrated Circuits (ICs) .....................10 Connector Definitions ........................11 Switch Definition ...........................11 Additional Components ........................13 Jumper Definitions........................14...
  • Page 4 Contents LCD Interface (J9)........................47 LVDS Interface (J7) ........................48 Miscellaneous........................... 49 Utility Interface (J18) ........................49 Reset Switch (SW1)........................49 Keyboard/Mouse Interface (J16) ....................49 Infrared (IrDA) Port (J17) ......................50 Real Time Clock (RTC)........................ 50 Oops! Jumper (BIOS Recovery) ....................50 User GPIO Signals (J2) .......................
  • Page 5 Contents Figure B-1. PXE Agent Boot Setup Screen..................77 List of Tables Table 2-1. Major Integrated Circuit Description and Function............10 Table 2-2. Connector Descriptions ....................11 Table 2-3. Reset Switch (SW1) .......................11 Table 2-4. Additional Component Descriptions ................13 Table 2-5. Jumper Settings ......................14 Table 2-6.
  • Page 6 Contents Reference Manual ReadyBoard 700...

  • Page 7: Chapter 1 About This Manual

    Chapter 1 About This Manual Purpose of this Manual This manual is for designers of systems based on the ReadyBoard™ 700 single board computer (SBC). This manual contains information that permits designers to create an embedded system based on specific design requirements.

  • Page 8: Related Ampro Products

    Chapter 1 About This Manual Chip specifications used on the ReadyBoard 700: Intel Corporation and the Celeron or Pentium III processor used for the embedded CPU. Web site: http://www.intel.com/design/intarch/datashts/273299.htm = Pentium III Web site: http://www.intel.com/design/intarch/datashts/273509.htm = Celeron VIA Technologies, Inc. and the Twister-T chipset, VT8606 and VT82C686B, used for the Northbridge/Video controller and Southbridge respectively.
  • Page 9 Chapter 1 About This Manual LittleBoard Family – These high-performance, highly integrated single-board computers use the EBX form factor (5.75x8.00 inches), and are available with Pentium III and Celeron processors. The EBX-compliant Little Board single-board computers offer functions equivalent to a complete laptop or desktop PC system, plus several expansion cards. Built-in extras to meet the critical requirements of embedded applications include onboard solid state disk capability, watchdog timer, smart power monitor, and Ampro embedded BIOS extensions.
  • Page 10 Chapter 1 About This Manual Reference Manual ReadyBoard 700...

  • Page 11: Chapter 2 Product Overview

    Chapter 2 Product Overview This introduction presents general information about the EPIC Architecture and the ReadyBoard 700 single board computer (SBC). After reading this chapter you should understand: EPIC Architecture ReadyBoard 700 architecture ReadyBoard 700 features Major components Connectors Specifications EPIC Architecture In 2004, five companies collaborated to publish a standard that fills the void between the EBX and the PC/104 size boards with a new industry standard form factor called “Embedded Platform for Industrial...

  • Page 12: Product Description

    Chapter 2 Product Overview Product Description The ReadyBoard 700 is a mid-sized, EPIC-compatible, low cost, high quality single-board system, which contains all the component subsystems of a PC/AT PCI motherboard plus the equivalent of up to 5 PCI expansion boards. The ReadyBoard 700 is based on either the ultra high performance, high- integration 933MHz Low Voltage Pentium®...
  • Page 13 Chapter 2 Product Overview Supports dual bus master mode Supports Ultra DMA 33/66/100 modes Supports ATAPI and DVD peripherals Supports IDE native and ATA compatibility modes CompactFlash Adapter (Secondary IDE only) Supports Type I or Type II PC Card socket Supports IDE CompactFlash Card Supports secondary IDE bus with Master/Slave jumper Supports bootable CompactFlash card...
  • Page 14 Chapter 2 Product Overview Supports PS/2 mouse Provides a shared over-current fuse Audio interface Supports AC’97 standard AC’97 CODEC on board Supports Stereo Line In/Out Supports MIC in (Mono) Ethernet Interface Supports two fully independent Ethernet (RJ45) ports Integrated LEDs on each port (Link/Activity and Speed) Two Intel 82551ER Controller chips Supports IEEE 802.3 10BaseT/100BaseTX compatible physical layer Supports auto-negotiation for speed, duplex mode, and flow control...

  • Page 15: Block Diagram

    Chapter 2 Product Overview Block Diagram Figure 2-2 shows the functional components of the board. Intel Clock CRT VGA SDRAM Northbridge Temp TFT LCD SODIMM Memory Bus VT8606 LVDS LCD SMBus PCI Bus PC/104-Plus IDE Primary Bus Connector IDE Secondary Southbridge CompactFlash Socket VT82C686B...

  • Page 16: Major Integrated Circuits (Ics)

    Chapter 2 Product Overview Major Integrated Circuits (ICs) Table 2-1 lists the major integrated circuits, including a brief description of each, on the ReadyBoard 700 and Figure 2-3 shows the location of the major chips. Table 2-1. Major Integrated Circuit Description and Function Chip Type Mfg.

  • Page 17: Connector Definitions

    Chapter 2 Product Overview Connector Definitions Table 2-2 describes the connectors shown in Figures 2-3 to 2-5. All I/O connectors use 0.1” pin spacing unless otherwise indicated. Table 2-2. Connector Descriptions Jack # Signal/Device Description RTC battery (B1) 2-pin, 1.25 header for battery input DIMM1 SODIMM 144-pin socket for SDRAM SODIMM...

  • Page 18: Figure 2-4. Connector Locations (Top View)

    Chapter 2 Product Overview Serial B (J3) (COM3 & 4) Fan (J1) GPIO (J2) Power In Serial A (J4) (J5A/B) (COM1 & 2) Power-On Header (J6) LVDS (J7) CRT (J8) (VGA) LCD (J9) Ethernet 1 (J10) PC/104-Plus (J12) PC/104 (J13A/B J14A/B) Ethernet 2 Lithium...

  • Page 19: Additional Components

    Chapter 2 Product Overview SODIMM Socket (DIMM1) CompactFlash Socket (J23) USB 1 Fuse (F4) USB 0 Fuse (F3) Keyboard/ Mouse Fuse (F2) USB 2 & 3 Fuse (F1) Figure 2-5. Connector and Component Locations (Bottom view) NOTE Pin-1 is shown as a black square in all connectors and jumpers in all illustrations.

  • Page 20: Jumper Definitions

    Chapter 2 Product Overview Jumper Definitions Table 2-5 describes the jumpers shown in Figure 2-6. Refer to the Oops! Jumper to clear the BIOS. Table 2-5. Jumper Settings Jumper # Installed Removed JP1 – TFT/LCD Clock Clock Invert (pins 1-2) Clock Normal (pins 2-3) Default JP2 –...

  • Page 21: Figure 2-6. Jumper, Switch, And Led Locations (Top View)

    Chapter 2 Product Overview TFT/LCD Clock (JP1) Serial B (COM3/COM4) RS485 Termination (JP6) Reserved Factory use only (J26) Voltage Setting (JP2) CMOS Reset Normal/ Switch Clear (SW1) (JP3) Master/ Power Slave (JP4) Activity Flash LEDs BIOS (D4) (JP5) Figure 2-6. Jumper, Switch, and LED Locations (Top view) ReadyBoard 700 Reference Manual...

  • Page 22: Specifications

    Chapter 2 Product Overview Specifications Physical Specifications Table 2-9 lists the physical dimensions of the board. Figures 2-7 and 2-8 give the mounting dimensions, including side views, and Figure 2-7 shows the pin-1 connector locations. Table 2-9. Weight and Footprint Dimensions Item Dimension NOTE...

  • Page 23: Thermal/Cooling Requirements

    Chapter 2 Product Overview Thermal/Cooling Requirements The CPU, Northbridge, Southbridge, Secondary I/O, and voltage regulators are the sources of heat on the board. The ReadyBoard 700 is designed to operate at its maximum CPU speed of 400MHz, 650MHz, or 933MHz. All the processors and the Northbridge require a heatsink, but no fan. Mechanical Specifications Figures 2-7 and 2-8 show the top view and side views of the ReadyBoard 700 with the mechanical mounting dimensions.

  • Page 24: Figure 2-8. Readyboard 700 Panel Dimensions (Side View)

    Chapter 2 Product Overview ReadyBoard 700 (Side view) USB 0 & 1 Serial 1 & 2 (J5A/B) Keyboard/ Power/IDE Ethernet 1 (J15A/B) (Serial 1 Lower) Mouse Activity (J10) (USB 0 Lower) (J16A/B) LED (D4) Ethernet 2 Reset (J11) Switch CRT (J8) (SW1) CompactFlash Socket (J23) 6.500...

  • Page 25: Chapter 3 Hardware

    Chapter 3 Hardware Overview This chapter discusses the chips and features of the connectors in the following order: CPU (U4) Memory (DIMM1) PC/104-Plus (J12A, B, C, D) PC/104 (J13A & B, J14C & D) IDE Interfaces (J22) CompactFlash Adapter (J23) Floppy /Parallel Interface (J20) Serial Interfaces (J5A/B, J3A/B) USB (J15A/B, J21A/B)

  • Page 26: Cpu (U4)

    Chapter 3 Hardware CPU (U4) The ReadyBoard 700 offers three Intel processor choices; high performance 933MHz Low Voltage (LV) Pentium® III processor, 650MHz Low Voltage (LV) Celeron® processor, or the low cost, 400MHz Ultra Low Voltage (ULV) Celeron processor. Celeron Processors The Celeron processors (Tualatin core) at 650MHz or 400MHz have 256kB L2 Cache on board and use a 100MHz FSB (front side bus).

  • Page 27: Interrupt Channel Assignments

    Chapter 3 Hardware Interrupt Channel Assignments The channel interrupt assignments are listed in Table 3-1. Table 3-1. Interrupt Channel Assignments Device vs IRQ No. 10 11 Timer Keyboard Secondary Cascade COM1 COM2 COM3 COM4 Floppy Parallel IDE Primary IDE Secondary Math Coprocessor PS/2 Mouse PCI INTA...

  • Page 28: I/O Address Map

    Chapter 3 Hardware Table 3-2. Memory Map Base Address Function 00000000h 0009FFFFh Conventional Memory 000A0000h 000AFFFFh Graphics Memory 000B0000h 000B7FFFh Mono Text Memory 000B8000h 000BFFFFh Color Text Memory 000C0000h 000C7FFFh Standard Video BIOS 000F0000h 000FFFFFh System BIOS Area (Storage and RAM Shadowing) 00100000h 04000000h Extended Memory (If onboard VGA is enabled, then the amount...

  • Page 29: Pc/104-Plus Interface (J12)

    Chapter 3 Hardware PC/104-Plus Interface (J12) The PC/104-Plus uses a 120-pin (30x4) 2mm header interface. This interface header carries all of the appropriate PCI signals operating at clock speeds up to 33MHz. The Northbridge, VT8606, integrates a PCI arbiter that supports up to four devices with three external PCI masters. This interface header accepts stackable modules and is located on the top of the board.
  • Page 30 Chapter 3 Hardware Pin # Signal Input/ Description Output 20 (A20) Digital Ground 21 (A21) AD29 PCI Address and Data Bus Line 29 – Refer to Pin-3 for more information. 22 (A22) +5 volt power supply ±5% 23 (A23) REQ0* Bus Request 0 –...
  • Page 31 Chapter 3 Hardware Pin # Signal Input/ Description Output 47 (B17) AD23 PCI Address and Data Bus Line 23 – Refer to Pin-3 for more information. 48 (B18) Digital Ground 49 (B19) C/BE3* PCI Bus Command/Byte Enable 3 – Refer to Pin-4 for more information.
  • Page 32 Chapter 3 Hardware Pin # Signal Input/ Description Output 76 (C16) Digital Ground 77 (C17) AD22 PCI Address and Data Bus Line 22 – Refer to Pin-3 for more information. 78 (C18) IDSEL1 Initialization Device Select 1 – Refer to Pin-18 for more information 79 (C19) VI/O...
  • Page 33 Chapter 3 Hardware Pin # Signal Input/ Description Output 106 (D16) AD19 PCI Address and Data Bus Line 19 – Refer to Pin-3 for more information. 107 (D17) +3.3V +3.3 volt power supply ±5% 108 (D18) IDSEL2 Initialization Device Select 2 – Refer to Pin-18 for more information.

  • Page 34: Pc/104 Interface (J13 A/B, J14 C/D)

    Chapter 3 Hardware PC/104 Interface (J13 A/B, J14 C/D) The PC/104 Bus uses a 104-pin 0.10” header interface. This interface header will carry all of the appropriate PC/104 signals operating at clock speeds up to 8MHz. This interface header accepts stackable modules and is located on the top of the board.

  • Page 35: Table 3-6. Pc/104 Interface Pin/Signal Descriptions (J13B)

    Chapter 3 Hardware Pin # Signal Description (J13 Row A) 25 (A25) System Address 6 – Refer to SA19, pin-A12, for more information. 26 (A26) System Address 5 – Refer to SA19, pin-A12, for more information. 27 (A27) System Address 4 – Refer to SA19, pin-A12, for more information. 28 (A28) System Address 3 –...

  • Page 36: Table 3-7. Pc/104 Interface Pin/Signal Descriptions (J14C)

    Chapter 3 Hardware Pin # Signal Descriptions (J13 Row B) 48 (B16) DRQ3 DMA Request 3 – Used by I/O resources to request DMA service. Must be held high until associated DACK3 line is active. 49 (B17) DACK1* DMA Acknowledge 1 – Used by DMA controller to select the I/O resource requesting the bus, or to request ownership of the bus as a bus master device.

  • Page 37: Table 3-8. Pc/104 Interface Pin/Signal Descriptions (J14D)

    Chapter 3 Hardware Pin # Signal Descriptions (J14 Row C) 5 (C4) LA21 Lactchable Address 21 – Refer to LA23, pin-C2, for more information. 6 (C5) LA20 Lactchable Address 20 – Refer to LA23, pin-C2, for more information. 7 (C6) LA19 Lactchable Address 19 –...
  • Page 38 Chapter 3 Hardware 30 (D9) DRQ0 DMA Request 0 – Used by I/O resources to request DMA service. Must be held high until associated DACK0 line is active. 31 (D10) DACK5* DMA Acknowledge 5 – Used by DMA controller to select the I/O resource requesting the bus, or to request ownership of the bus as a bus master device.

  • Page 39: Ide Interface (J22)

    Chapter 3 Hardware IDE Interface (J22) The ReadyBoard 700 provides one IDE connector (J22) for two IDE devices on the primary IDE controller and one CompactFlash socket (J23) on the secondary IDE controller. The EIDE interface logic supports the following features: Transfer rate up to 100Mbps Increased reliability using Ultra DMA 33/66/100 transfer protocols Full scatter-gather capability...
  • Page 40 Chapter 3 Hardware Pin # Signal Description Digital Ground PDIOW* Primary Device I/O Read/Write Strobe – Strobe signal for write functions. Negative edge enables data from a register or data port of the drive onto the host data bus. Positive edge latches data at the host. Digital Ground PDIOR* Primary I/O Read/Write Strobe –...

  • Page 41: Compactflash Adapter (J23)

    Chapter 3 Hardware CompactFlash Adapter (J23) The board contains a Type I or II PC card socket, which allows for the insertion of a CompactFlash Card. The CompactFlash Card acts as a standard IDE Drive and is connected to the Secondary IDE bus. If a CompactFlash card is installed, it is the only device using the secondary IDE bus.
  • Page 42 Chapter 3 Hardware Pin # Signal Description CFD2 Connected through 4.7k ohm resister to ground CFD1 Connected through 4.7k ohm resister to ground SDD11 Secondary Disk Data 11 – Refer to SDD3 on pin-2 for more information. SDD12 Secondary Disk Data 12 – Refer to SDD3 on pin-2 for more information. SDD13 Secondary Disk Data 13 –...

  • Page 43: Floppy/Parallel Interface (J20)

    Chapter 3 Hardware Floppy/Parallel Interface (J20) The Southbridge (VT82C686B) chip provides the floppy controller and the parallel port controller. The floppy controller and the parallel port controller share the same output connector (J20) on the board and the device selection is made in the BIOS Setup Utility. Refer to Table 4-2 for floppy configurations. Floppy Port Controller supports two floppy drives (34-pin &...
  • Page 44 Chapter 3 Hardware Pin # Signal Description SLCTIN Select In – This output signal to the printer is used to select the printer. I/O pin in ECP/EPP mode. STEP* Step – Low pulse for each track-to-track movement of the head. AUTOFDX* Auto Feed* –...

  • Page 45: Serial Interfaces (J5A/B, J3A/B)

    Chapter 3 Hardware Serial Interfaces (J5A/B, J3A/B) The ReadyBoard supports 4 independent serial ports, using two separate chips. The Southbridge (VT86C686B) provides serial ports 1 and 2 through the Serial A DB9 connector (J5A/B) and the Secondary I/O chip (W83877TF) provides serial ports 3 and 4 through Serial B connector (J3A/B). The four serial ports support the following features: Four individual 16550-compatible UARTs Programmable word length, stop bits and parity...

  • Page 46: Serial A Interface (J5A/B)

    Chapter 3 Hardware Serial A Interface (J5A/B) Table 3-12. Serial A (Serial 1) Interface Pin/Signal Descriptions (J5A) Pin # Signal Description DCD1* Data Carrier Detect 1 – Indicates external serial communications device is detecting a carrier signal (i.e., a communication channel is currently open). In direct connect environments, this input will be driven by DTR1 as part of the DTR/DSR handshake.

  • Page 47: Serial B Interface (J3A/B)

    Chapter 3 Hardware Serial B Interface (J3A/B) Table 3-14. Serial B Interface Pin/Signal Descriptions (J3A/B) Pin # Pin # Signal Description DCD3* Data Carrier Detect 3 – Indicates external serial communications device is detecting a carrier signal (i.e., a communication channel is currently (COM3) open).
  • Page 48 Chapter 3 Hardware Pin # Pin # Signal Description CTS4* Clear To Send 4 – Indicates external serial communications device is ready to receive data. Used as hardware handshake with RTS4 for low level flow control. RX4+ RX4+ – If in RS485 or RS422 mode, this pin is Receive Data 4 +. DTR4* Data Terminal Ready 4 –...

  • Page 49: Usb Interfaces (J15A/B, J21A/B)

    Chapter 3 Hardware USB Interfaces (J15A/B, J21A/B) The ReadyBoard 700 contains one root USB hub with four functional USB ports. The PC-style (or Standard) connector (J5A/B) provides two of the four USB ports (USB0 and USB1). The other two USB ports share a single 10 pin header (J21A/B) on the board. Features implemented in the USB ports include the following: One root hub and two USB ports on connector (J15A/B) One root hub and two USB ports on connector (J21A/B)

  • Page 50: Ethernet Interfaces (J10, J11)

    Chapter 3 Hardware Ethernet Interfaces (J10, J11) The Ethernet solution is provided by two Intel 82551ER PCI controller chips, which consists of both the Media Access Controller (MAC) and the physical layer (PHY) combined into a single component solution. The 82551ER is a 32-bit PCI controller that features enhanced scatter-gather bus mastering capabilities, which enables the 82551ER to perform high-speed data transfers over the PCI bus.

  • Page 51: Audio Interface (J19)

    Chapter 3 Hardware Table 3-18. Ethernet Port 2 Pin/Signal Descriptions (J11) Pin # GND Digital Ground TX2+ Analog Twisted Pair Ethernet Transmit Differential Pair. These pins transmit the serial bit stream for transmission on the Unshielded Twisted Pair Cable TX2- (UTP).

  • Page 52: Video Interfaces (J8, J9, J7)

    Chapter 3 Hardware Video Interfaces (J8, J9, J7) The VT8606 chip provides the graphics control and video signals to the traditional glass CRT monitors and the LCD and LVDS flat panel displays. The chip features are listed below: CRT features: Supports a max resolution of 1600 x 1200 with video frame buffer set at 8MB Supports a maximum allowable video frame buffer size of 32MB UMA (Unified Memory Architecture)

  • Page 53: Lcd Interface (J9)

    Chapter 3 Hardware LCD Interface (J9) Table 3-21. LCD Interface Pin/Signal Descriptions (J9) Pin # Signal Description Not connected FP33 Flat Panel Data Output 33 – The mapping for these signals (0-35) changes with the type of flat panel selected in BIOS Setup. Refer to the notes for this table. FP34 Flat Panel Data Output 34 –...

  • Page 54: Lvds Interface (J7)

    Chapter 3 Hardware Pin # Signal Description FPDEN Flat Panel Data Enable – This signal to settle the horizontal display position. Flat Panel Data Output 0 – Refer to pin-2 for more information. FPCLKS Flat Panel Shift clock – This signal can be inverted by jumper JP1. VEEON Voltage On –...

  • Page 55: Miscellaneous

    Chapter 3 Hardware Miscellaneous Utility Interface (J18) Power-On – This control signal is provided externally by connecting ground to pin-1 on the Utility connector (J18). Reset Switch – This signal is provided externally through a switch by connecting ground to pin-3 on the Utility connector (J18).

  • Page 56: Infrared (Irda) Port (J17)

    Chapter 3 Hardware Infrared (IrDA) Port (J17) The Infrared Data Association (IrDA) control provides a two-way communications header for an external IrDA device using infrared as the transmission medium. There are two basic infrared implementations provided; the Hewlett-Packard Serial Infrared (HPSIR) and the Amplitude Shift Keyed Infrared (ASKIR) methods.

  • Page 57: User Gpio Signals (J2)

    Chapter 3 Hardware Serial 1 (J5A) Lower Port (COM1) Standard DB9 Serial Port Connector (Female) Rear View Figure 3-2. Oops! Jumper Connection User GPIO Signals (J2) The ReadyBoard 700 provides eight GPIO pins for custom use and the signals are routed to connector J2.

  • Page 58: Watchdog Timer

    Chapter 3 Hardware Serial Console Setup The serial console feature is implemented by connecting a standard null modem cable or a modified serial cable (or “Hot Cable”) between one of the serial ports, such as Serial 1 (J5A), and the serial terminal or a PC with communications software.

  • Page 59: Power Interfaces (J4, J6)

    Chapter 3 Hardware Power Interfaces (J4, J6) The ReadyBoard 700 uses various voltages onboard, but only one voltage is required externally (+5 volts) through the external connector, which uses a 4-pin header with 0.200” spacing. The optional +12V volts is also provided on the input connector, but is not used on the board except for LCD panel power and for PCI or ISA bus power.
  • Page 60 Chapter 3 Hardware Reference Manual ReadyBoard 700...

  • Page 61: Chapter 4 Bios Setup

    Chapter 4 BIOS Setup Introduction This chapter describes the BIOS Setup menus and the various screens used for configuring the ReadyBoard 700. Some features in the Operating System or application software may require configuration in the BIOS Setup screens. This section assumes the user is familiar with general BIOS Setup and does not attempt to describe the BIOS functions.

  • Page 62: Accessing Bios Setup (Serial Console)

    Chapter 4 BIOS Setup Accessing BIOS Setup (Serial Console) Entering the BIOS Setup, in serial console mode, is very similar to the steps you use to enter BIOS Setup with a VGA display, except the actual keys you use. 1. Set the serial terminal, or the PC with communications software to the following settings: 115k baud 8 bits One stop bit...

  • Page 63: Bios Menus

    Chapter 4 BIOS Setup BIOS Menus BIOS Setup Opening Screen Ampro Setup Utility for ReadyBoard 700, SWxxxxxx Help for BIOS and Hardware Settings > BIOS and Hardware Settings < Reload Initial Settings Load Factory Default Settings Exit, Saving Changes Exit, Discarding Changes Use Arrow keys to change menu item, use Enter to select menu item (C) Copyright 2004, Ampro Computers, Inc.

  • Page 64: Bios Configuration Screen

    Chapter 4 BIOS Setup BIOS Configuration Screen Ampro Setup Utility for ReadyBoard 700, SWxxxxxx [Date & Time] Help for Date > Date Oct 2004< Time 10:24:34 [Drive Assignment] The Date & Time fields are updated Drive A 1.44 MB, 3.5” in real-time.

  • Page 65: Table 4-2. Floppy Drive Bios Settings

    Chapter 4 BIOS Setup Table 4-2. Floppy Drive BIOS Settings # of Floppy Drive(s) BIOS Settings None Set Drives A and B to [None] (1) Non-USB Floppy* Configure Drive A to floppy drive type (For example, [1.44MB, 3.5”] ) Set Drive B to [None] (1) USB Floppy Set USB Boot Support to [Enable] Set Drive A to [USB Floppy]...
  • Page 66 Chapter 4 BIOS Setup Boot 3 – [none], [Drive A], [Drive B], [Drive C], [Drive D], [CDROM], [Alarm], or [Reboot] Boot 4 – [none], [Drive A], [Drive B], [Drive C], [Drive D], [CDROM], [Alarm], or [Reboot] Boot 5 – [none], [Drive A], [Drive B], [Drive C], [Drive D], [CDROM], [Alarm], or [Reboot] Boot 6 –...
  • Page 67 Chapter 4 BIOS Setup Keyboard and Mouse (Configuration) Numlock – [Disabled] or [Enabled] Typematic – [Disabled] or [Enabled] This field is used for the keyboard. Delay – [250ms], [500ms], [750ms], or [1000ms] This field is used for the keyboard and determines how many milliseconds the keyboard controller waits before stating to repeat a key, if the key is held down on the keyboard.
  • Page 68 Chapter 4 BIOS Setup Memory Hole – [Disabled], [1MB], or [2MB] This field specifies the size of an optional memory hole, below 16MB. Access to the memory addresses inside the memory hole region are forwarded to the PC/104 bus, where memory mapped PC/104 devices have access.
  • Page 69 Chapter 4 BIOS Setup Watchdog Timeout (sec) – [select whole number between 255 seconds and 1 second, in 1 second increments] or [Disabled] If this field is enabled by selecting a time interval (1 to 255 seconds), it will direct the watchdog timer to reset the system if it fails to boot the OS properly.
  • Page 70 Chapter 4 BIOS Setup On-Board Serial Ports NOTE Serial Ports 1 and 2 can not share the same IRQs, and the IRQs used for Serial Ports 1 and 2 can not be used for Serial Ports 3 and 4 and vice versa.
  • Page 71 Chapter 4 BIOS Setup DMA – [3], [2], [1], or [0] This field specifies the DMA channel used for the Parallel Port (LPT 1). If the LPT 1 field is set to [Disabled], then no DMA channel is assigned, making it available for other devices.

  • Page 72: Table 4-3. Lcd Panel Type List

    Chapter 4 BIOS Setup Panel Type – [640 x 480 x 18 TFT] Refer to Table 4-3 for the list of supported resolutions and flat panel types. Some LCD panels may require video BIOS modifications. It you think this is the case, or would like help in setting up your LCD panel, contact Ampro for assistance with the LCD panel adaptation.
  • Page 73 Chapter 4 BIOS Setup PnP OS – [Disabled] or [Enabled] If this field is set to [Enabled], the BIOS makes the Plug and Play API available for Plug and Play Operating Systems. This allows the Plug and Play OS to get the Plug and Play information by calling the Plug and Play API.
  • Page 74 Chapter 4 BIOS Setup Assign IRQ 11 – [Disabled] or [Enabled] (Typically ISA Bridge/Native IDE) If this field is set to [Enabled], then the BIOS can assign this IRQ to a Plug and Play adapter. If another device in the system is using this IRQ, then this field should be set to [Disabled].
  • Page 75 Chapter 4 BIOS Setup Assign DMA 5 – [Disabled] or [Enabled] If this field is set to [Enabled], then the BIOS can assign this DMA channel to a Plug and Play adapter. If another device in the system is using this DMA channel, then this field should be set to [Disabled].

  • Page 76: Splash Screen Customization

    Chapter 4 BIOS Setup Splash Screen Customization The ReadyBoard 700 BIOS supports a graphical splash screen, which can be customized by the user and displayed on screen when enabled through the BIOS Setup Utility. The graphical image can be a company logo or any custom image the user wants to display during the boot process.
  • Page 77 Chapter 4 BIOS Setup Use the following steps to convert and load your custom image onto the ReadyBoard 700. 1. Copy the files from the RB700\software\examples\splash directory on the CD-ROM to a new directory (conversion directory) on your PC. This new conversion directory is where you intend to do the conversion and save the file. 2.
  • Page 78 Chapter 4 BIOS Setup Reference Manual ReadyBoard 700...

  • Page 79: Appendix A Technical Support

    Appendix A Technical Support Ampro Computers, Inc. provides a number of methods for contacting Technical Support listed in the Table A-1 below. Requests for support through the Virtual Technician are given the highest priority, and usually will be addressed within one working day. Ampro Virtual Technician –...
  • Page 80 Appendix A Technical Support Reference Manual ReadyBoard 700...

  • Page 81: Appendix Blan Boot Option

    Appendix B LAN Boot Option The LAN Boot feature is optional for the ReadyBoard 700 and you must contact Ampro or your sales representative for more information before you can make use of this option. The LAN Boot option requires a BIOS update, installed by Ampro, to make use of the LAN Boot features. Introduction LAN Boot is supported by both Ethernet ports on the ReadyBoard 700, and is based on the Preboot Execution Environment (PXE), an open industry standard.

  • Page 82: Pxe Boot Agent Bios Setup

    Appendix B LAN Boot Option PXE Boot Agent BIOS Setup This section describes the BIOS settings of the third party PXE Boot agent provided by Ampro and integrated into the ReadyBoard 700 firmware upgrade. The PXE Boot Agent’s BIOS setup menu and screens are used when configuring the LAN boot feature in the ReadyBoard 700 BIOS.

  • Page 83: Pxe Boot Agent Setup Screen

    Appendix B LAN Boot Option PXE Boot Agent Setup Screen Argon Managed PC Boot Agent (MBA) v4.31 (BIOS integrated) (C) Copyright 2002, Argon Technology Corporation (C) Copyright 2003, 3COM Corporation All rights reserved Configuration Boot Method: Default Boot: Local Local Boot: Enabled Config Message Enabled...
  • Page 84 Appendix B LAN Boot Option NetWare Configuration Boot Method: – [PXE], [TCP/IP], [NetWare], or [RPL] Protocol: – [802.2], [802.3], or [EthII] Default Boot: – [Local] or [Network] Local Boot: – [Disabled] or [Enabled] Config Message: – [Disabled] or [Enabled] Message Timeout: – [3 seconds], [6 seconds], [12 seconds], or [Forever] Boot Failure Prompt: –...

  • Page 85: Index

    Index 400MHz CPU CD-ROM heatsinks required ..........17 ReadyBoard 700 Doc & SW ......2 650MHz CPU CompactFlash heatsinks required ..........17 always use [HDD/CF Sec Master/Slave]..58 933MHz CPU ATA format selection ........60 heatsinks required ..........17 connector pin outs..........35 Ampro Products connectors connector list ...........
  • Page 86 Index Power On ............14 EPIC Architecture..........5 Lithium Battery Ethernet features ..........44 external connection ..........50 feature list ............6 RTC..............50 floppy disk drive features ........ 37 major integrated circuit (chip) specifications floppy drive configurations......59 web sites.............2 GPIO feature............ 51 memory map ............21 IDE features.............
  • Page 87 Appendix B LAN Boot Option Celeron CPUs ..........6, 20 USB boot device........58, 59, 63 CompactFlash socket (1)......7, 35 USB ports (4) ..........7, 43 console redirection ...........51 video interfaces (3) ........8, 46 Ethernet interfaces (2)........8, 44 voltage sensor ............ 8 Ethernet port LEDs ..........14 watchdog timer (WDT) ......
  • Page 88 Index Reference Manual ReadyBoard 700...

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