A/D Pacer Gate Signal; A/D External Timebase Signal - Measurement Computing PCI-DAS6013 User Manual

PCI-DAS6013 and PCI-DAS6014 User's Guide
The A/D CONVERT signal is generated by the on-board pacer circuit unless the
external clock option is in use. This signal may be gated by hardware (A/D PACER
GATE) or software.

A/D PACER GATE signal

The A/D PACER GATE signal is used to disable scans temporarily. This signal may be
programmed for input at any of the AUXIN pins.
If the A/D PACER GATE signal is active, no scans can occur. If the A/D PACER
GATE signal becomes active during a scan in progress, the current scan is completed
and scans are then held off until the gate is de-asserted.

A/D EXTERNAL TIMEBASE signal

You can use the A/D EXTERNAL TIMEBASE signal as the source for the on-board
pacer circuit rather than the 40 MHz internal time base. Any AUXIN pin can be set
programmatically as the source for this signal. The polarity is programmable.
The maximum frequency for the A/D EXTERNALTIMEBASE signal is 20 MHz. The
minimum pulse width is 23 ns high or low. There is no minimum frequency
specification.
Figure 4-13
signal.
Figure 4-12. A/D CONVERT Signal Output Timing Requirement
shows the timing specifications for the A/D EXTERNAL TIMEBASE
t =50 ns minimum
p
t
w
t =23 ns minimum
w
Figure 4-13. A/D EXTERNAL TIMEBASE Signal Timing
t
w
t = 50 ns
w
t
p
t
w
4-9
Functional Details