ICOP Technology ICOP-602X User Manual page 59

Flat Panel Connector Pin Description
Name
P0~P23
ENABKL
SHFCLK
FLM
+12V
ENAVEE
– SHFCLK
VDDM
ICOP Embedede 386SX CPU ISA Half Size SBC User's Manual
Flat panel data output
Activity Indicator and Enable Backlight outputs
Shift clock. Pixel clock for flat panel data
M signal for panel AC drive control
M
Latch pulse. Flat panel equivalent of HSYNC
LP
First line marker. Flat panel equivalent of VSYNC
+12V power from PC power supply
Power sequencing controls for panel LCD bias volt
the inverter signal of SHFCLK
3.3V or 5V selected by JP6
Description
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