Altera DE2-115 User Manual page 67

Figure 4-37 Connections between FPGA and SD Card Socket
Signal Name
SRAM_ADDR[0]
SRAM_ADDR[1]
SRAM_ADDR[2]
SRAM_ADDR[3]
SRAM_ADDR[4]
SRAM_ADDR[5]
SRAM_ADDR[6]
SRAM_ADDR[7]
SRAM_ADDR[8]
SRAM_ADDR[9]
SRAM_ADDR[10]
SRAM_ADDR[11]
SRAM_ADDR[12]
SRAM_ADDR[13]
SRAM_ADDR[14]
SRAM_ADDR[15]
SRAM_ADDR[16]
SRAM_ADDR[17]
SRAM_ADDR[18]
SRAM_ADDR[19]
SRAM_DQ[0]
SRAM_DQ[1]
SRAM_DQ[2]
SRAM_DQ[3]
SRAM_DQ[4]
SRAM_DQ[5]
SRAM_DQ[6]
Table 4-27 SRAM Pin Assignments
FPGA Pin No.
PIN_AB7
PIN_AD7
PIN_AE7
PIN_AC7
PIN_AB6
PIN_AE6
PIN_AB5
PIN_AC5
PIN_AF5
PIN_T7
PIN_AF2
PIN_AD3
PIN_AB4
PIN_AC3
PIN_AA4
PIN_AB11
PIN_AC11
PIN_AB9
PIN_AB8
PIN_T8
PIN_AH3
PIN_AF4
PIN_AG4
PIN_AH4
PIN_AF6
PIN_AG6
PIN_AH6
Description
SRAM Address[0]
SRAM Address[1]
SRAM Address[2]
SRAM Address[3]
SRAM Address[4]
SRAM Address[5]
SRAM Address[6]
SRAM Address[7]
SRAM Address[8]
SRAM Address[9]
SRAM Address[10]
SRAM Address[11]
SRAM Address[12]
SRAM Address[13]
SRAM Address[14]
SRAM Address[15]
SRAM Address[16]
SRAM Address[17]
SRAM Address[18]
SRAM Address[19]
SRAM Data[0]
SRAM Data[1]
SRAM Data[2]
SRAM Data[3]
SRAM Data[4]
SRAM Data[5]
SRAM Data[6]
66
I/O Standard
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V