Altera tPad DE2-115 User Manual
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Altera tPad DE2-115 User Manual

Altera tPad DE2-115 User Manual

Tpad board with lcd touch panel and camera
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  • Page 2: Table Of Contents

    CONTENTS Chapter 1 Introduction of the tPad..............2 1.1 About the Kit ............................6 1.2 Getting Help ............................7 Chapter 2 tPad Architecture ................8 2.1 Layout and Components ........................8 2.2 Block Diagram of the tPad ........................9 Chapter 3 Using the tPad ..................

  • Page 3: Introduction Of The Tpad

    IP to best suit their specific application. The tPad features the DE2-115 development board targeting the Cyclone IV E FPGA, as well as a LCD multimedia color touch panel and a 5-Megapixel digital image sensor module.
  • Page 4 Figure 1-1 The tPad board overview The key features of the board are listed below:  DE2-115 Development Board  Cyclone IV EP4CE115 FPGA o 114,480 LEs o 432 M9K memory blocks o 3,888 Kbits embedded memory o 4 PLLs ...
  • Page 5  Audio o 24-bit encoder/decoder (CODEC) o Line-in, line-out, and microphone-in jacks  Display o 16x2 LCD module  On-Board Clocking Circuitry o Three 50MHz oscillator clock inputs o SMA connectors (external clock input/output)  SD Card Socket o Provides SPI and 4-bit SD mode for SD Card access ...
  • Page 6  Power o Desktop DC input o Switching and step-down regulators LM3150MH  LCD touch screen module  Equipped with an 8-inch Amorphous-TFT-LCD (Thin Film Transistor Liquid Crystal Display) module  Module composed of LED backlight  Support 18-bit parallel RGB interface ...

  • Page 7: About The Kit

    Table 1-2 Key performance parameters of the CMOS sensor Parameter Value Active Pixels 2592Hx1944V Pixel size 2.2umx2.2um Color filter array RGB Bayer pattern Shutter type Global reset release(GRR) Maximum data rate/master clock 96Mp/s at 96MHz Full resolution Programmable up to 15 fps Frame rate VGA mode Programmable up to 70 fps...

  • Page 8: Getting Help

    Figure 1-2 tPad kit package contents Here is information of how to get help if you encounter any problem:  Terasic Technologies  Tel: +886-3-550-8800  Email: support@terasic.com...

  • Page 9: Chapter 2 Tpad Architecture

    Chapter 2 tPad Architecture This chapter describes the architecture of the tPad including block diagram and components. The picture of the tPad is shown in Figure 2-1 Figure 2-2. It depicts the layout of the board and indicates the locations of the connectors and key components. Figure 2-1 tPad PCB and component diagram (top view)

  • Page 10: Block Diagram Of The Tpad

    Figure 2-2 tPad PCB and component diagram (bottom view) Figure 2-3 gives the block diagram of the tPad board. To provide maximum flexibility for the user, all connections are made through the Cyclone IV E FPGA device. Thus, the user can configure the FPGA to implement any system design.

  • Page 11: Using The Tpad

    AS programming: In this method, called Active Serial programming, the configuration bit stream is downloaded into the Altera EPCS64 serial configuration device. It provides non-volatile storage of the bit stream, so that the information is retained even when the power supply to the tPad board is turned off.
  • Page 12 Figure 3-1 JTAG Chain Figure 3-2 The JTAG chain configuration header  Configuring the FPGA in JTAG Mode Figure 3-3 illustrates the JTAG configuration setup. To download a configuration bit stream into the Cyclone IV E FPGA, perform the following steps: ...
  • Page 13 Figure 3-3 The JTAG chain configuration scheme Figure 3-4 The RUN/PROG switch (SW19) is set to JTAG mode  Configuring the EPCS64 in AS Mode Figure 3-5 illustrates the AS configuration set up. To download a configuration bit stream into the EPCS64 serial configuration device, perform the following steps: ...

  • Page 14: Bus Controller

    Figure 3-5 The AS configuration scheme The tPad comes with a bus controller using the Max II EPM240 that allows user to access the touch screen module through the HSMC connector. This section describes its structure in block diagram form and its capabilities. ...

  • Page 15: Using The 8" Lcd Touch Screen Module

    ” ” The tPad features an 8-inch Amorphous-TFT-LCD panel. The LCD Touch Screen module offers resolution of (800x600) to provide users the best display quality for developing applications. The LCD panel supports 18-bit parallel RGB data interface. The tPad is also equipped with an Analog Devices AD7843 touch screen digitizer chip. The AD7843 is a 12-bit analog to digital converter (ADC) for digitizing x and y coordinates of touch points applied to the touch screen.

  • Page 16: Using 5-Megapixel Digital Image Sensor Module

    LCD_R2 PIN_R28 LCD red data bus bit 2 2.5V LCD_R3 PIN_U27 LCD red data bus bit 3 2.5V LCD_R4 PIN_U28 LCD red data bus bit 4 2.5V LCD_R5 PIN_V27 LCD red data bus bit 5 2.5V LCD_G0 PIN_P21 LCD green data bus bit 0 2.5V LCD_G1 PIN_R21...
  • Page 17 CAMERA_ D3 PIN_G26 Pixel data bit 3 2.5V CAMERA_ D4 PIN_H25 Pixel data bit 4 2.5V CAMERA_ D5 PIN_H26 Pixel data bit 5 2.5V CAMERA_ D6 PIN_K25 Pixel data bit 6 2.5V CAMERA_ D7 PIN_K26 Pixel data bit 7 2.5V CAMERA_ D8 PIN_L23 Pixel data bit 8...

  • Page 18: Chapter 4 Tpad Demonstrations

    To run and recompile the demonstrations, you should:  Install Altera Quartus II 10.0 and NIOS II EDS 10.0 or later edition on the host computer  Install the USB-Blaster driver software. You can find instructions in the tutorial “Getting Started with Altera‟s DE2-115 Board”...

  • Page 19: Tpad Starter Demonstration

    Figure 4-1 Application selector interface Note: Please insert the supplied SD Card from this demonstration. The tPad starter demonstration takes user the initial experience of an embedded system integrating a LCD Touch Panel. This demonstration consists of two sub item, Touch and Color pattern generator. The Touch segment draws a circle on where you touch the screen and updates its coordinates on the top left corner.
  • Page 20 Figure 4-2 Block diagram of the tPad Starter demonstration Figure 4-3 illustrates the software structure of this demonstration. The touch panel‟s SPI HAL block responds to the bottom hardware requests and interface to upper layers. The SGDMA HAL allocates required frame/descriptor buffers to specified memory address and is responsible of handling frame buffer update issue.
  • Page 21 Make sure Quartus II and Nios II are installed on your PC  Power on the DE2-115 board  Connect USB-Blaster to the DE2-115 board and install USB-Blaster driver if necessary  Execute the demo batch file “tPad_Starter.bat” under the batch file folder, tPad_Starter\demo_batch ...
  • Page 22 Figure 4-4 Main interface of the tPad Starter demonstration Figure 4-5 The tPad Starter Touch sub item...

  • Page 23: Tpad Picture Viewer

    Figure 4-6 The tPad Starter Pattern sub item This demonstration shows a simple picture viewer implementation using Nios II based SOPC system. It reads JPEG images stored on SD Card and displays them on the LCD. The Nios II CPU decodes the images and fills the raw result data into frame buffers in SDRAM.
  • Page 24 Figure 4-7 Block diagram of the picture viewer demonstration  Demonstration Source Code  Project directory: tPad_Picture_Viewer  Bit stream used: tPad_Picture_Viewer.sof  Nios II Workspace: tPad_Picture_Viewer\Software  Demonstration Batch File Demo Batch File Folder: tPad_Picture_Viewer\demo_batch The demo batch file includes the following files: ...
  • Page 25  Run the Nios II Software under the workspace tPad_Picture_Viewer\Software (Note*)  Touch the play button will proceed to display the next image. Figure 4-8 gives a screen shot of the tPad picture viewer demonstration. Table 4-1 shows the instructions for running the demonstration Figure 4-8 tPad picture viewer demonstration Table 4-1 Touch panel displayed information...

  • Page 26: Video And Image Processing

    These two cores convert the industry-standard clocked video format (BT-656) to Input/Output Avalon-ST video and vice versa. These functions allow you to fully integrate common video functions with video interfaces, processors, and external memory controllers. The example design uses an Altera Cyclone® IV E EP4CE115F29 featured tPad board.
  • Page 27 A video source is input through an analog composite port on tPad which generates a digital output in ITU BT656 format. A number of common video functions are performed on this input stream in the FPGA. These functions include clipping, chroma resampling, motion adaptive deinterlacing, color space conversion, picture-in-picture mixing, and polyphase scaling.
  • Page 28 Press and drag the video frame box will result in scaling the playing window to any size, as shown in Figure 4-10 Note: (1).Execute tPad_VIP\demo_batch\tPad _VIP.bat will download .sof and .elf files. (2).You may need additional Altera VIP suite Megacore license features to recompile the project. Figure 4-11 illustrates the setup for this demonstration.

  • Page 29: Tpad Camera Application

    8-inch LCD modules on the tPad. The CMOS sensor module sends the raw image data to FPGA on DE2-115 Board, the FPGA on the board is handling image processing part and converts the data to RGB format to display on the LCD module. The I2C Sensor Configuration module is used to configure the CMOS sensor module.
  • Page 30 As soon as the configuration code is downloaded into the FPGA, the I2C Sensor Configuration block will initial the CMOS sensor via I2C interface. The CMOS sensor is configured as follow:  Row and Column Size: 800 * 600  Exposure time: Adjustable ...
  • Page 31 Load the bit stream into FPGA by execute the batch file „tPad_Camera.bat‟ under tPad_Camera\demo_batch\ folder  The system enters the FREE RUN mode automatically. Press KEY[0] on the DE2-115 board to reset the circuit  Press KEY[2] to take a shot of the photo; you can press KEY[3] again to switch back to...

  • Page 32: Video And Image Processing For Camera

    photograph of the demonstration. Table 4-3 The functional keys of the digital camera demonstration Component Function Description KEY[0] Reset circuit KEY[1] Set the new exposure time (use with SW[0] ) KEY[2] Trigger the Image Capture (take a shot) KEY[3] Switch to Free Run mode Off: Extend the exposure time SW[0] On: Shorten the exposure time...
  • Page 33 These functions allow you to fully integrate common video functions with video interfaces, processors, and external memory controllers. The example design uses an Altera Cyclone® IV E EP4CE115F29 featured tPad board. A video source is input through the CMOS sensor on tPad which generates a digital output in RGB format.
  • Page 34 Figure 4-14 VIP Camera Example SOPC Block Diagram (Key Components)  Demonstration Source Code  Project directory: tPad_VIP_Camera  Bit stream used: tPad_VIP_Camera.sof  Nios II Workspace: tPad_VIP_Camera \Software  Demonstration Batch File Demo Batch File Folder: tPad_VIP_Camera\demo_batch The demo batch file includes the following files:...
  • Page 35 Run the Nios II and choose tPad_VIP_Camera\Software as the workspace. Click on the Run button (note *)  The system enters the FREE RUN mode automatically. Press KEY[0] on the DE2-115 board to reset the circuit  Press KEY[2] to stop run; you can press KEY[3] again to switch back to FREE RUN mode and you should be able to see whatever the camera captures on the VGA display ...
  • Page 36 Figure 4-15 Setup for the tPad_VIP_Camera demonstration...

  • Page 37: Chapter 5 Application Selector

    Chapter 5 Application Selector The application selector utility is the default code that powers on the FPGA and offers a graphical interface on LCD allowing users to select and run different demonstrations resides on SD Card. You can find several Ready to Run SD Card demos in your SD Card root directory as well as in the System CD under tPad_Factory_Recovery\Application_Selector folder.

  • Page 38: Running The Application Selector

     Connect power to the tPad board  Insert the SD Card with applications into the SD Card socket of tPad  Switch on the power (SW18) (1*)  Scroll to select the demonstration to load using the side-bar  Tap on the Load button to load and run a demonstration (2*) Note: (1).If the board is already powered, the application selector will boot from EPCS, and a splash...
  • Page 39 Copy both the .SOF and .ELF files into a common directory relying on your choice. This directory is where you will convert the files  On your host PC, launch a Nios II Command Shell from Start ->Programs -> Altera -> Nios II <version #> EDS -> Nios II Command Shell ...
  • Page 40 sof2flash --epcs --input=”your example.sof” --output= “your example_HW.flash”(3*)  Convert .flash file into .binary file nios2-elf-objcopy –I srec –O binary “your example_HW.flash” “your example_HW.bin”  From the command shell navigate to where your ELF file is located and create your software binary file using the following command nios2-elf-objcopy –O binary “your example.elf”...

  • Page 41: Restoring The Factory Image

    Copy both the tPad_Selector.sof and tPad_Selector.elf files into a common directory relying on your choice. This directory is where you will convert the files  On your host PC, launch a Nios II Command Shell from Start ->Programs -> Altera -> Nios II <version #> EDS -> Nios II Command Shell ...
  • Page 42 Restoring the original binary file To restore the original contents of the Application Selector, perform the following steps:  Copy tPad_Selector project into a local directory of your choice. The tPad_Selector project is placed in tPad_Demonstrations\tPad_Selector  Power on the tPad board, with the USB cable connected to the USB Blaster port ...

  • Page 43: Chapter 6 Appendix

    Chapter 6 Appendix Version Change Log V1.0 Initial Version (Preliminary) V1.0.1 Kit content image updated V1.0.2 Descriptions of the camera demonstration’s mirror mode added Copyright © 2010 Terasic Technologies. All rights reserved.

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